From 60c896b48c591b0df0d3452624421826d40f318d Mon Sep 17 00:00:00 2001 From: Leway Colin Date: Thu, 8 Jun 2017 01:40:13 +0800 Subject: [PATCH] Typo: is should be if ? (#786) Typo: is should be if ? --- src/main/scala/uncore/ahb/SRAM.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/uncore/ahb/SRAM.scala b/src/main/scala/uncore/ahb/SRAM.scala index 585f4efa..aa830511 100644 --- a/src/main/scala/uncore/ahb/SRAM.scala +++ b/src/main/scala/uncore/ahb/SRAM.scala @@ -63,7 +63,7 @@ class AHBRAM(address: AddressSet, executable: Boolean = true, beatBytes: Int = 4 // Use single-ported memory with byte-write enable val mem = SeqMem(1 << mask.filter(b=>b).size, Vec(beatBytes, Bits(width = 8))) - // Decide is the SRAM port is used for reading or (potentially) writing + // Decide if the SRAM port is used for reading or (potentially) writing val read = a_request && !a_write // In case we choose to stall, we need to hold the read data val d_rdata = mem.readAndHold(a_address, read)