[rocket] Automatically kill D$ access on address exceptions
Doing this internally to the cache eliminates a long control path from the cache to the core and back to the cache.
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@ -807,7 +807,7 @@ class HellaCache(implicit p: Parameters) extends L1HellaCacheModule()(p) {
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io.cpu.req.ready := Bool(true)
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val s1_valid = Reg(next=io.cpu.req.fire(), init=Bool(false))
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val s1_req = Reg(io.cpu.req.bits)
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val s1_valid_masked = s1_valid && !io.cpu.s1_kill
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val s1_valid_masked = s1_valid && !io.cpu.s1_kill && !io.cpu.xcpt.asUInt.orR
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val s1_replay = Reg(init=Bool(false))
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val s1_clk_en = Reg(Bool())
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@ -872,11 +872,6 @@ class HellaCache(implicit p: Parameters) extends L1HellaCacheModule()(p) {
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io.cpu.xcpt.pf.ld := s1_read && dtlb.io.resp.xcpt_ld
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io.cpu.xcpt.pf.st := s1_write && dtlb.io.resp.xcpt_st
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assert (!(Reg(next=
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(io.cpu.xcpt.ma.ld || io.cpu.xcpt.ma.st || io.cpu.xcpt.pf.ld || io.cpu.xcpt.pf.st)) &&
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s2_valid_masked),
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"DCache exception occurred - cache response not killed.")
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// tags
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def onReset = L1Metadata(UInt(0), ClientMetadata.onReset)
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val meta = Module(new MetadataArray(onReset _))
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