From 5d1064fcb178d32811c4067e519f1f12a021d8ab Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Wed, 7 Dec 2016 20:56:28 -0800 Subject: [PATCH] ahb: include a unit test --- src/main/scala/uncore/ahb/Test.scala | 36 +++++++++++++++++++++++++++ src/main/scala/unittest/Configs.scala | 1 + 2 files changed, 37 insertions(+) create mode 100644 src/main/scala/uncore/ahb/Test.scala diff --git a/src/main/scala/uncore/ahb/Test.scala b/src/main/scala/uncore/ahb/Test.scala new file mode 100644 index 00000000..44df8ec7 --- /dev/null +++ b/src/main/scala/uncore/ahb/Test.scala @@ -0,0 +1,36 @@ +// See LICENSE.SiFive for license details. + +package uncore.ahb + +import Chisel._ +import config._ +import diplomacy._ +import uncore.tilelink2._ +import unittest._ + +class RRTest0(address: BigInt)(implicit p: Parameters) extends AHBRegisterRouter(address, 0, 32, 0, 4)( + new AHBRegBundle((), _) with RRTest0Bundle)( + new AHBRegModule((), _, _) with RRTest0Module) + +class RRTest1(address: BigInt)(implicit p: Parameters) extends AHBRegisterRouter(address, 0, 32, 1, 4, false)( + new AHBRegBundle((), _) with RRTest1Bundle)( + new AHBRegModule((), _, _) with RRTest1Module) + +class AHBFuzzBridge()(implicit p: Parameters) extends LazyModule +{ + val fuzz = LazyModule(new TLFuzzer(5000)) + val model = LazyModule(new TLRAMModel("AHBFuzzMaster")) + val ram = LazyModule(new AHBRAM(AddressSet(0x0, 0xff))) + + model.node := fuzz.node + ram.node := TLToAHB()(model.node) + + lazy val module = new LazyModuleImp(this) with HasUnitTestIO { + io.finished := fuzz.module.io.finished + } +} + +class AHBBridgeTest()(implicit p: Parameters) extends UnitTest(500000) { + val dut = Module(LazyModule(new AHBFuzzBridge).module) + io.finished := dut.io.finished +} diff --git a/src/main/scala/unittest/Configs.scala b/src/main/scala/unittest/Configs.scala index 5137dee8..ab714be3 100644 --- a/src/main/scala/unittest/Configs.scala +++ b/src/main/scala/unittest/Configs.scala @@ -32,6 +32,7 @@ class WithUncoreUnitTests extends Config( Module(new uncore.devices.TileLinkRAMTest()), Module(new uncore.converters.TileLinkWidthAdapterTest()), Module(new uncore.tilelink2.TLFuzzRAMTest), + Module(new uncore.ahb.AHBBridgeTest), Module(new uncore.axi4.AXI4LiteFuzzRAMTest), Module(new uncore.axi4.AXI4FullFuzzRAMTest), Module(new uncore.axi4.AXI4BridgeTest)) }