Add option to make misa read-only
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09468a272b
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5cfe070932
@ -606,7 +606,8 @@ class CSRFile(perfEventSets: EventSets = new EventSets(Seq()))(implicit p: Param
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when (decoded_addr(CSRs.misa)) {
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when (decoded_addr(CSRs.misa)) {
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val mask = UInt(isaStringToMask(isaMaskString), xLen)
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val mask = UInt(isaStringToMask(isaMaskString), xLen)
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val f = wdata('f' - 'a')
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val f = wdata('f' - 'a')
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reg_misa := ~(~wdata | (!f << ('d' - 'a'))) & mask | reg_misa & ~mask
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if (coreParams.misaWritable)
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reg_misa := ~(~wdata | (!f << ('d' - 'a'))) & mask | reg_misa & ~mask
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}
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}
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when (decoded_addr(CSRs.mip)) {
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when (decoded_addr(CSRs.mip)) {
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// MIP should be modified based on the value in reg_mip, not the value
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// MIP should be modified based on the value in reg_mip, not the value
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@ -24,6 +24,7 @@ case class RocketCoreParams(
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nPMPs: Int = 8,
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nPMPs: Int = 8,
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nPerfCounters: Int = 0,
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nPerfCounters: Int = 0,
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haveBasicCounters: Boolean = true,
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haveBasicCounters: Boolean = true,
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misaWritable: Boolean = true,
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nL2TLBEntries: Int = 0,
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nL2TLBEntries: Int = 0,
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mtvecInit: Option[BigInt] = Some(BigInt(0)),
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mtvecInit: Option[BigInt] = Some(BigInt(0)),
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mtvecWritable: Boolean = true,
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mtvecWritable: Boolean = true,
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@ -29,6 +29,7 @@ trait CoreParams {
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val nBreakpoints: Int
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val nBreakpoints: Int
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val nPerfCounters: Int
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val nPerfCounters: Int
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val haveBasicCounters: Boolean
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val haveBasicCounters: Boolean
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val misaWritable: Boolean
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val nL2TLBEntries: Int
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val nL2TLBEntries: Int
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val mtvecInit: Option[BigInt]
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val mtvecInit: Option[BigInt]
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val mtvecWritable: Boolean
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val mtvecWritable: Boolean
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