riscv/rocket-chip
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Debug: add Debug regression to Travis regressions.

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This commit is contained in:
Megan Wachs
2017-11-03 08:38:18 -07:00
parent 4449dd0baa
commit 593839e0d5
2 changed files with 32 additions and 13 deletions
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7
.travis.yml
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@ -69,6 +69,11 @@ jobs:
- export CXX=g++-4.8 CC=gcc-4.8
- &test
stage: Test
script:
- travis_wait 80 make emulator-ndebug -C regression SUITE=JtagDtmSuite JVM_MEMORY=3G
- travis_wait 80 make emulator-jtag-dtm-tests-32 -C regression SUITE=JtagDtmSuite JVM_MEMORY=3G
- travis_wait 80 make emulator-jtag-dtm-tests-64 -C regression SUITE=JtagDtmSuite JVM_MEMORY=3G
- <<: *test
script:
- travis_wait 80 make emulator-ndebug -C regression SUITE=UnittestSuite JVM_MEMORY=3G
- travis_wait 80 make emulator-regression-tests -C regression SUITE=UnittestSuite JVM_MEMORY=3G
@ -83,4 +88,4 @@ jobs:
- <<: *test
script:
- travis_wait 80 make emulator-ndebug -C regression SUITE=RocketSuiteA JVM_MEMORY=3G
- travis_wait 80 make emulator-regression-tests -C regression SUITE=RocketSuiteA JVM_MEMORY=3G
- travis_wait 80 make emulator-regression-tests -C regression SUITE=RocketSuiteA JVM_MEMORY=3G