Make DecodeLogic interface more flexible
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924261e2b2
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@ -40,9 +40,9 @@ trait ScalarOpConstants {
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val A2_ZERO = UInt(2, 3)
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val A2_ZERO = UInt(2, 3)
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val A2_FOUR = UInt(3, 3)
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val A2_FOUR = UInt(3, 3)
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val X = Bits("b?", 1)
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val X = Bool.DC
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val N = Bits(0, 1)
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val N = Bool(false)
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val Y = Bits(1, 1)
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val Y = Bool(true)
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val WB_X = UInt("b??", 2)
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val WB_X = UInt("b??", 2)
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val WB_ALU = UInt(0, 3);
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val WB_ALU = UInt(0, 3);
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@ -14,28 +14,24 @@ object DecodeLogic
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new Term(lit.value)
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new Term(lit.value)
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}
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}
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}
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}
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def logic(addr: Bits, addrWidth: Int, cache: scala.collection.mutable.Map[Term,Bits], terms: Seq[Term]) = {
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def logic(addr: UInt, addrWidth: Int, cache: scala.collection.mutable.Map[Term,Bool], terms: Seq[Term]) = {
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terms.map { t =>
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terms.map { t =>
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if (!cache.contains(t))
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cache.getOrElseUpdate(t, (if (t.mask == 0) addr else addr & Lit(BigInt(2).pow(addrWidth)-(t.mask+1), addrWidth){Bits()}) === Lit(t.value, addrWidth){Bits()})
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cache += t -> ((if (t.mask == 0) addr else addr & Lit(BigInt(2).pow(addrWidth)-(t.mask+1), addrWidth){Bits()}) === Lit(t.value, addrWidth){Bits()})
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cache(t).toBool
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}.foldLeft(Bool(false))(_||_)
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}.foldLeft(Bool(false))(_||_)
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}
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}
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def apply(addr: Bits, default: Iterable[Bits], mapping: Iterable[(Bits, Iterable[Bits])]) = {
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def apply[T <: Bits](addr: UInt, default: T, mapping: Iterable[(UInt, T)]): T = {
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var map = mapping
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val cache = caches.getOrElseUpdate(Module.current, collection.mutable.Map[Term,Bool]())
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var cache = scala.collection.mutable.Map[Term,Bits]()
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val dterm = term(default)
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default map { d =>
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val (keys, values) = mapping.unzip
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val dterm = term(d)
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val (keys, values) = map.unzip
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val addrWidth = keys.map(_.getWidth).max
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val addrWidth = keys.map(_.getWidth).max
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val terms = keys.toList.map(k => term(k))
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val terms = keys.toList.map(k => term(k))
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val termvalues = terms zip values.toList.map(v => term(v.head))
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val termvalues = terms zip values.toList.map(term(_))
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for (t <- keys.zip(terms).tails; if !t.isEmpty)
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for (t <- keys.zip(terms).tails; if !t.isEmpty)
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for (u <- t.tail)
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for (u <- t.tail)
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assert(!t.head._2.intersects(u._2), "DecodeLogic: keys " + t.head + " and " + u + " overlap")
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assert(!t.head._2.intersects(u._2), "DecodeLogic: keys " + t.head + " and " + u + " overlap")
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val result = (0 until math.max(d.litOf.width, values.map(_.head.litOf.width).max)).map({ case (i: Int) =>
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val result = (0 until default.litOf.width.max(values.map(_.litOf.width).max)).map({ case (i: Int) =>
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val mint = termvalues.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == 1 }.map(_._1)
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val mint = termvalues.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == 1 }.map(_._1)
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val maxt = termvalues.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == 0 }.map(_._1)
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val maxt = termvalues.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == 0 }.map(_._1)
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val dc = termvalues.filter { case (k,t) => ((t.mask >> i) & 1) == 1 }.map(_._1)
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val dc = termvalues.filter { case (k,t) => ((t.mask >> i) & 1) == 1 }.map(_._1)
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@ -49,10 +45,20 @@ object DecodeLogic
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if (defbit == 0) bit else ~bit
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if (defbit == 0) bit else ~bit
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}
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}
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}).reverse.reduceRight(Cat(_,_))
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}).reverse.reduceRight(Cat(_,_))
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map = map map { case (x,y) => (x, y.tail) }
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default.fromBits(result)
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result
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}
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def apply[T <: Bits](addr: UInt, default: Iterable[T], mappingIn: Iterable[(UInt, Iterable[T])]): Iterable[T] = {
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var mapping = mappingIn
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default map { thisDefault =>
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val thisMapping = for ((key, values) <- mapping) yield key -> values.head
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val res = apply(addr, thisDefault, thisMapping)
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mapping = for ((key, values) <- mapping) yield key -> values.tail
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res
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}
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}
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}
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}
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def apply(addr: UInt, trues: Iterable[UInt], falses: Iterable[UInt]): Bool =
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apply(addr, Bool.DC, trues.map(_ -> Bool(true)) ++ falses.map(_ -> Bool(false)))
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private val caches = collection.mutable.Map[Module,collection.mutable.Map[Term,Bool]]()
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}
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}
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class Term(val value: BigInt, val mask: BigInt = 0)
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class Term(val value: BigInt, val mask: BigInt = 0)
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