riscv/rocket-chip
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TLError: does not need to be fast; cut the loop

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The SystemBus already has a flow buffer on outputs.
This commit is contained in:
Wesley W. Terpstra 2017-07-29 00:22:21 -07:00
parent 540256e24a
commit 56e28026a6
1 changed files with 1 additions and 1 deletions
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src/main/scala/devices/tilelink/Error.scala
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@ -97,5 +97,5 @@ trait HasSystemErrorSlave extends HasSystemBus {
private val params = p(ErrorParams)
val error = LazyModule(new TLError(params, sbus.beatBytes))
error.node := sbus.toSlave
error.node := TLBuffer(BufferParams.pipe)(sbus.toSlave)
}