riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

add AVec, which automatically infers element type

Browse Source 
should consider modifying Vec as such
This commit is contained in:
Andrew Waterman 2012-11-24 18:19:28 -08:00
parent 2b26082132
commit 55082e45c4
1 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
rocket/src/main/scala/util.scala
View File

@ -11,6 +11,15 @@ object Util
implicit def wcToUFix(c: WideCounter): UFix = c.value implicit def wcToUFix(c: WideCounter): UFix = c.value
} }
object AVec
{
def apply[T <: Data](elts: Seq[T]): Vec[T] = {
require(elts.tail.forall(elts.head.getClass == _.getClass))
Vec(elts) { elts.head.clone }
}
def apply[T <: Data](elt0: T, elts: T*): Vec[T] = apply(elt0 :: elts.toList)
}
// a counter that clock gates most of its MSBs using the LSB carry-out // a counter that clock gates most of its MSBs using the LSB carry-out
case class WideCounter(width: Int, inc: Bool = Bool(true)) case class WideCounter(width: Int, inc: Bool = Bool(true))
{ {