diff --git a/src/main/scala/diplomacy/Nodes.scala b/src/main/scala/diplomacy/Nodes.scala index 75c1f1a5..6b4490f3 100644 --- a/src/main/scala/diplomacy/Nodes.scala +++ b/src/main/scala/diplomacy/Nodes.scala @@ -396,47 +396,6 @@ class NexusNode[D, U, EO, EI, B <: Data](imp: NodeImp[D, U, EO, EI, B])( implicit valName: ValName) extends MixedNexusNode[D, U, EI, B, D, U, EO, B](imp, imp)(dFn, uFn, numPO, numPI) -case class SplitterArg[T](newSize: Int, ports: Seq[T]) -class MixedSplitterNode[DI, UI, EI, BI <: Data, DO, UO, EO, BO <: Data]( - inner: InwardNodeImp [DI, UI, EI, BI], - outer: OutwardNodeImp[DO, UO, EO, BO])( - dFn: SplitterArg[DI] => Seq[DO], - uFn: SplitterArg[UO] => Seq[UI], - numPO: Range.Inclusive = 1 to 999, - numPI: Range.Inclusive = 1 to 999)( - implicit valName: ValName) - extends MixedNode(inner, outer)(numPO, numPI) -{ - override val externalIn: Boolean = true - override val externalOut: Boolean = true - - protected[diplomacy] def resolveStar(iKnown: Int, oKnown: Int, iStars: Int, oStars: Int): (Int, Int) = { - require (oKnown == 0, s"${name} (a splitter) appears right of a := or :*=; use a :=* instead${lazyModule.line}") - require (iStars == 0, s"${name} (a splitter) cannot appear left of a :*=; did you mean :=*?${lazyModule.line}") - (0, iKnown) - } - protected[diplomacy] def mapParamsD(n: Int, p: Seq[DI]): Seq[DO] = { - require (p.size == 0 || n % p.size == 0, s"Diplomacy bug; splitter inputs do not divide outputs") - val out = dFn(SplitterArg(n, p)) - require (out.size == n, s"${name} created the wrong number of outputs from inputs${lazyModule.line}") - out - } - protected[diplomacy] def mapParamsU(n: Int, p: Seq[UO]): Seq[UI] = { - require (n == 0 || p.size % n == 0, s"Diplomacy bug; splitter outputs indivisable by inputs") - val out = uFn(SplitterArg(n, p)) - require (out.size == n, s"${name} created the wrong number of inputs from outputs${lazyModule.line}") - out - } -} - -class SplitterNode[D, U, EO, EI, B <: Data](imp: NodeImp[D, U, EO, EI, B])( - dFn: SplitterArg[D] => Seq[D], - uFn: SplitterArg[U] => Seq[U], - numPO: Range.Inclusive = 1 to 999, - numPI: Range.Inclusive = 1 to 999)( - implicit valName: ValName) - extends MixedSplitterNode[D, U, EI, B, D, U, EO, B](imp, imp)(dFn, uFn, numPO, numPI) - class IdentityNode[D, U, EO, EI, B <: Data](imp: NodeImp[D, U, EO, EI, B])(implicit valName: ValName) extends AdapterNode(imp)({s => s}, {s => s}) diff --git a/src/main/scala/tilelink/Nodes.scala b/src/main/scala/tilelink/Nodes.scala index 697ddd9a..9d74db5f 100644 --- a/src/main/scala/tilelink/Nodes.scala +++ b/src/main/scala/tilelink/Nodes.scala @@ -95,14 +95,6 @@ case class TLNexusNode( implicit valName: ValName) extends NexusNode(TLImp)(clientFn, managerFn, numClientPorts, numManagerPorts) -case class TLSplitterNode( - clientFn: SplitterArg[TLClientPortParameters] => Seq[TLClientPortParameters], - managerFn: SplitterArg[TLManagerPortParameters] => Seq[TLManagerPortParameters], - numClientPorts: Range.Inclusive = 0 to 999, - numManagerPorts: Range.Inclusive = 0 to 999)( - implicit valName: ValName) - extends SplitterNode(TLImp)(clientFn, managerFn, numClientPorts, numManagerPorts) - abstract class TLCustomNode( numClientPorts: Range.Inclusive, numManagerPorts: Range.Inclusive)( diff --git a/src/main/scala/tilelink/Splitter.scala b/src/main/scala/tilelink/Splitter.scala index abebecc3..39207ddc 100644 --- a/src/main/scala/tilelink/Splitter.scala +++ b/src/main/scala/tilelink/Splitter.scala @@ -6,6 +6,37 @@ import Chisel._ import freechips.rocketchip.config.Parameters import freechips.rocketchip.diplomacy._ +case class SplitterArg[T](newSize: Int, ports: Seq[T]) +case class TLSplitterNode( + clientFn: SplitterArg[TLClientPortParameters] => Seq[TLClientPortParameters], + managerFn: SplitterArg[TLManagerPortParameters] => Seq[TLManagerPortParameters], + numClientPorts: Range.Inclusive = 0 to 999, + numManagerPorts: Range.Inclusive = 0 to 999)( + implicit valName: ValName) + extends TLCustomNode(numClientPorts, numManagerPorts) +{ + val externalIn = true + val externalOut = true + + def resolveStar(iKnown: Int, oKnown: Int, iStars: Int, oStars: Int): (Int, Int) = { + require (oKnown == 0, s"${name} (a splitter) appears right of a := or :*=; use a :=* instead${lazyModule.line}") + require (iStars == 0, s"${name} (a splitter) cannot appear left of a :*=; did you mean :=*?${lazyModule.line}") + (0, iKnown) + } + def mapParamsD(n: Int, p: Seq[TLClientPortParameters]): Seq[TLClientPortParameters] = { + require (p.size == 0 || n % p.size == 0, s"Diplomacy bug; splitter inputs do not divide outputs") + val out = clientFn(SplitterArg(n, p)) + require (out.size == n, s"${name} created the wrong number of outputs from inputs${lazyModule.line}") + out + } + def mapParamsU(n: Int, p: Seq[TLManagerPortParameters]): Seq[TLManagerPortParameters] = { + require (n == 0 || p.size % n == 0, s"Diplomacy bug; splitter outputs indivisable by inputs") + val out = managerFn(SplitterArg(n, p)) + require (out.size == n, s"${name} created the wrong number of inputs from outputs${lazyModule.line}") + out + } +} + class TLSplitter(policy: TLArbiter.Policy = TLArbiter.roundRobin)(implicit p: Parameters) extends LazyModule { val node = TLSplitterNode(