diff --git a/uncore/src/main/scala/tilelink2/Nodes.scala b/uncore/src/main/scala/tilelink2/Nodes.scala
index 6fbb3dee..1679c17b 100644
--- a/uncore/src/main/scala/tilelink2/Nodes.scala
+++ b/uncore/src/main/scala/tilelink2/Nodes.scala
@@ -72,15 +72,16 @@ class BaseNode[PO, PI, EO, EI, B <: Bundle](imp: NodeImp[PO, PI, EO, EI, B])(
   }
 }
 
-class OutputNode[PO, PI, EO, EI, B <: Bundle](imp: NodeImp[PO, PI, EO, EI, B])
+class IdentityNode[PO, PI, EO, EI, B <: Bundle](imp: NodeImp[PO, PI, EO, EI, B])
   extends BaseNode(imp)(Some{case Seq(x) => x}, Some{case Seq(x) => x}, 1 to 1, 1 to 1)
+
+class OutputNode[PO, PI, EO, EI, B <: Bundle](imp: NodeImp[PO, PI, EO, EI, B]) extends IdentityNode(imp)
 {
   override def connectOut = bundleOut
   override def connectIn  = bundleOut
 }
 
-class InputNode[PO, PI, EO, EI, B <: Bundle](imp: NodeImp[PO, PI, EO, EI, B])
-  extends BaseNode(imp)(Some{case Seq(x) => x}, Some{case Seq(x) => x}, 1 to 1, 1 to 1)
+class InputNode[PO, PI, EO, EI, B <: Bundle](imp: NodeImp[PO, PI, EO, EI, B]) extends IdentityNode(imp)
 {
   override def connectOut = bundleIn
   override def connectIn  = bundleIn
diff --git a/uncore/src/main/scala/tilelink2/TLNodes.scala b/uncore/src/main/scala/tilelink2/TLNodes.scala
index 08001759..270d3cab 100644
--- a/uncore/src/main/scala/tilelink2/TLNodes.scala
+++ b/uncore/src/main/scala/tilelink2/TLNodes.scala
@@ -29,6 +29,7 @@ object TLImp extends NodeImp[TLClientPortParameters, TLManagerPortParameters, TL
   }
 }
 
+case class TLIdentityNode() extends IdentityNode(TLImp)
 case class TLOutputNode() extends OutputNode(TLImp)
 case class TLInputNode() extends InputNode(TLImp)