From 4f388add6785bd1edafc38943875dbf6d8c008be Mon Sep 17 00:00:00 2001
From: Ben Keller <bkeller@eecs.berkeley.edu>
Date: Thu, 25 Aug 2016 14:42:04 -0700
Subject: [PATCH] More accurate conditional include of generated .d make
 fragment (#222)

---
 emulator/Makefile | 2 +-
 vsim/Makefile     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/emulator/Makefile b/emulator/Makefile
index 758edffd..eb0b881b 100644
--- a/emulator/Makefile
+++ b/emulator/Makefile
@@ -35,7 +35,7 @@ test:
 # Run assembly tests and benchmarks
 #--------------------------------------------------------------------
 
-ifneq ($(MAKECMDGOALS),clean)
+ifneq ($(filter run% %.run %.out %.vpd %.vcd,$(MAKECMDGOALS)),)
 -include $(generated_dir)/$(MODEL).$(CONFIG).d
 endif
 
diff --git a/vsim/Makefile b/vsim/Makefile
index 54e69522..a2ccdec1 100644
--- a/vsim/Makefile
+++ b/vsim/Makefile
@@ -21,7 +21,7 @@ TB ?= TestDriver
 
 include $(base_dir)/Makefrag
 include $(sim_dir)/Makefrag
-ifneq ($(MAKECMDGOALS),clean)
+ifneq ($(filter run% %.run %.out %.vpd %.vcd,$(MAKECMDGOALS)),)
 -include $(generated_dir)/$(MODEL).$(CONFIG).d
 endif
 include $(base_dir)/vsim/Makefrag-verilog