Merge remote-tracking branch 'origin/master' into ipxact_descs
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commit
4e11491531
@ -785,7 +785,7 @@ class TLDebugModuleInner(device: Device, getNComponents: () => Int, beatBytes: I
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val go = Bool()
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val go = Bool()
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}
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}
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val flags = Wire(init = Vec.fill(nComponents){new flagBundle().fromBits(0.U)})
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val flags = Wire(init = Vec.fill(1024){new flagBundle().fromBits(0.U)})
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assert ((cfg.hartSelToHartId(selectedHartReg) < 1024.U),
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assert ((cfg.hartSelToHartId(selectedHartReg) < 1024.U),
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"HartSel to HartId Mapping is illegal for this Debug Implementation, because HartID must be < 1024 for it to work.");
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"HartSel to HartId Mapping is illegal for this Debug Implementation, because HartID must be < 1024 for it to work.");
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flags(cfg.hartSelToHartId(selectedHartReg)).go := goReg
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flags(cfg.hartSelToHartId(selectedHartReg)).go := goReg
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@ -905,10 +905,9 @@ class TLDebugModuleInner(device: Device, getNComponents: () => Int, beatBytes: I
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ABSTRACT(cfg) -> RegFieldGroup("debug_abstract", Some("Instructions generated by Debug Module"),
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ABSTRACT(cfg) -> RegFieldGroup("debug_abstract", Some("Instructions generated by Debug Module"),
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abstractGeneratedMem.zipWithIndex.map{ case (x,i) => RegField.r(32, x, RegFieldDesc(s"debug_abstract_$i", "", volatile=true))}),
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abstractGeneratedMem.zipWithIndex.map{ case (x,i) => RegField.r(32, x, RegFieldDesc(s"debug_abstract_$i", "", volatile=true))}),
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FLAGS -> RegFieldGroup("debug_flags", Some("Memory region used to control hart going/resuming in Debug Mode"),
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FLAGS -> RegFieldGroup("debug_flags", Some("Memory region used to control hart going/resuming in Debug Mode"),
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flags.zipWithIndex.map{case(x, i) => RegField.r(8, x.asUInt(), RegFieldDesc(s"debug_flags_${i}", "", volatile=true))}),
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flags.zipWithIndex.map{case(x, i) => RegField.r(8, x.asUInt(), RegFieldDesc(s"debug_flags_$i", "", volatile=true))}),
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ROMBASE -> RegFieldGroup("debug_rom", Some("Debug ROM"),
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ROMBASE -> RegFieldGroup("debug_rom", Some("Debug ROM"),
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DebugRomContents().zipWithIndex.map{case (x, i) => RegField.r(8, (x & 0xFF).U(8.W),
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DebugRomContents().zipWithIndex.map{case (x, i) => RegField.r(8, (x & 0xFF).U(8.W), RegFieldDesc(s"debug_rom_$i", "", reset=Some(x)))})
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RegFieldDesc(s"debug_rom_$i", "", reset=Some(x)))})
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)
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)
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// Override System Bus accesses with dmactive reset.
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// Override System Bus accesses with dmactive reset.
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