riscv/rocket-chip
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code clean in dcache, no need to check the condition twice.

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Wei Song
2015-06-02 22:06:12 +01:00
parent b6e68773fd
commit 4db60d9e9d
1 changed files with 1 additions and 1 deletions
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rocket/src/main/scala/nbdcache.scala
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@@ -882,7 +882,7 @@ class HellaCache extends L1HellaCacheModule {
val s2_recycle_ecc = (s2_valid || s2_replay) && s2_hit && s2_data_correctable val s2_recycle_ecc = (s2_valid || s2_replay) && s2_hit && s2_data_correctable
val s2_recycle_next = Reg(init=Bool(false)) val s2_recycle_next = Reg(init=Bool(false))
when (s1_valid || s1_replay) { s2_recycle_next := (s1_valid || s1_replay) && s2_recycle_ecc } when (s1_valid || s1_replay) { s2_recycle_next := s2_recycle_ecc }
s2_recycle := s2_recycle_ecc || s2_recycle_next s2_recycle := s2_recycle_ecc || s2_recycle_next
// after a nack, block until nack condition resolves to save energy // after a nack, block until nack condition resolves to save energy