riscv/rocket-chip
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make sure UseAtomics is on when PTW is being used

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This commit is contained in:
Howard Mao 2016-06-22 16:09:45 -07:00
parent d1c83ccda0
commit 4c31248917
1 changed files with 2 additions and 0 deletions
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rocket/src/main/scala/ptw.scala
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@ -59,6 +59,8 @@ class PTW(n: Int)(implicit p: Parameters) extends CoreModule()(p) {
val dpath = new DatapathPTWIO val dpath = new DatapathPTWIO
} }
require(usingAtomics, "PTW requires atomic memory operations")
val s_ready :: s_req :: s_wait :: s_set_dirty :: s_wait_dirty :: s_done :: Nil = Enum(UInt(), 6) val s_ready :: s_req :: s_wait :: s_set_dirty :: s_wait_dirty :: s_done :: Nil = Enum(UInt(), 6)
val state = Reg(init=s_ready) val state = Reg(init=s_ready)
val count = Reg(UInt(width = log2Up(pgLevels))) val count = Reg(UInt(width = log2Up(pgLevels)))