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axi4 Fragmenter: handle more inflight AXI requests than we have space

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This commit is contained in:
Wesley W. Terpstra 2016-10-13 15:25:21 -07:00
parent 8005266131
commit 4c1c52486b
2 changed files with 8 additions and 4 deletions
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8
src/main/scala/uncore/axi4/Fragmenter.scala
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@ -257,13 +257,17 @@ class AXI4FragmenterSideband(maxInFlight: Int, flow: Boolean = false) extends Mo
val state = RegInit(PASS)
val count = RegInit(UInt(0, width = log2Up(maxInFlight)))
val full = count === UInt(maxInFlight-1)
val empty = count === UInt(0)
val last = count === UInt(1)
io.deq.bits := state(1) || (last && state(0)) // PASS || (last && WAIT)
io.deq.valid := !empty
io.enq.ready := empty || (state === FIND) || (state === PASS && io.enq.bits)
io.enq.ready := !full && (empty || (state === FIND) || (state === PASS && io.enq.bits))
// WAIT => count > 0
assert (state =/= WAIT || count =/= UInt(0))
if (flow) {
when (io.enq.valid) {
@ -275,7 +279,7 @@ class AXI4FragmenterSideband(maxInFlight: Int, flow: Boolean = false) extends Mo
count := count + io.enq.fire() - io.deq.fire()
switch (state) {
is(PASS) { when (io.enq.valid && !io.enq.bits && empty) { state := FIND } }
is(FIND) { when (io.enq.valid && io.enq.bits) { state := Mux(empty, PASS, WAIT) } }
is(FIND) { when (io.enq.valid && io.enq.bits && !full) { state := Mux(empty, PASS, WAIT) } }
is(WAIT) { when (last && io.deq.ready) { state := PASS } }
}
}

4
src/main/scala/uncore/axi4/Test.scala
View File

@ -47,8 +47,8 @@ class AXI4FullFuzzRAM extends LazyModule
model.node := fuzz.node
xbar.node := model.node
ram.node := AXI4Fragmenter(lite=false)(TLToAXI4(4,false)(xbar.node))
gpio.node := AXI4Fragmenter(lite=false)(TLToAXI4(4,true )(xbar.node))
ram.node := AXI4Fragmenter(lite=false, maxInFlight = 2)(TLToAXI4(4,false)(xbar.node))
gpio.node := AXI4Fragmenter(lite=false, maxInFlight = 5)(TLToAXI4(4,true )(xbar.node))
lazy val module = new LazyModuleImp(this) with HasUnitTestIO {
io.finished := fuzz.module.io.finished