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Revert "For D$, use source 0 through N-1 for MMIO, not 1 through N"

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This reverts commit 0538dc77ce.
This commit is contained in:
Wesley W. Terpstra
2017-03-27 15:19:16 -07:00
parent fa7ead6357
commit 4959771c97
2 changed files with 9 additions and 7 deletions
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src/main/scala/rocket/HellaCache.scala
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@ -60,6 +60,7 @@ trait HasL1HellaCacheParameters extends HasL1CacheParameters with HasCoreParamet
def encRowBits = encDataBits*rowWords
def lrscCycles = 32 // ISA requires 16-insn LRSC sequences to succeed
def nIOMSHRs = cacheParams.nMMIOs
def maxUncachedInFlight = cacheParams.nMMIOs
def dataScratchpadSize = cacheParams.dataScratchpadBytes
require(rowBits >= coreDataBits, s"rowBits($rowBits) < coreDataBits($coreDataBits)")