1
0

updated riscv-bmarks and riscv-tests to build with new toolchain

This commit is contained in:
Rimas Avizienis
2011-11-15 00:11:22 -08:00
parent db87924fbf
commit 48cec01710
3 changed files with 109 additions and 46 deletions

View File

@ -45,7 +45,7 @@ class rocketDpath extends Component
val alu = new rocketDpathALU();
val ex_alu_out = alu.io.out;
val ex_jr_target = ex_alu_out(31,0);
val ex_jr_target = ex_alu_out(VADDR_BITS,0);
val div = new rocketDivider(64);
val div_result = div.io.div_result_bits;
@ -342,7 +342,7 @@ class rocketDpath extends Component
// D$ request interface (registered inside D$ module)
// other signals (req_val, req_rdy) connect to control module
io.dmem.req_addr := ex_alu_out(PADDR_BITS-1,0);
io.dmem.req_addr := ex_alu_out(VADDR_BITS-1,0);
io.dmem.req_data := ex_reg_rs2;
io.dmem.req_tag := ex_reg_waddr;