From 47a0c880a4da2bdd1d3ee46d333805ac6db9b843 Mon Sep 17 00:00:00 2001
From: Howard Mao <zhehao.mao@gmail.com>
Date: Mon, 15 Aug 2016 13:58:23 -0700
Subject: [PATCH] make sure TLId set in Periphery

---
 src/main/scala/RocketChip.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/RocketChip.scala b/src/main/scala/RocketChip.scala
index 9c79680e..478343b0 100644
--- a/src/main/scala/RocketChip.scala
+++ b/src/main/scala/RocketChip.scala
@@ -125,7 +125,7 @@ class Top(topParams: Parameters) extends Module with HasTopLevelParameters {
   val io = new TopIO
 
   val coreplex = p(BuildCoreplex)(p)
-  val periphery = Module(new Periphery)
+  val periphery = Module(new Periphery()(innerParams))
 
   if (exportMMIO) { periphery.io.mmio_in.get <> coreplex.io.mmio.get }
   periphery.io.mem_in <> coreplex.io.mem