diff --git a/uncore/src/main/scala/tilelink2/Operations.scala b/uncore/src/main/scala/tilelink2/Operations.scala index 33f5e6c6..8f1fd4ea 100644 --- a/uncore/src/main/scala/tilelink2/Operations.scala +++ b/uncore/src/main/scala/tilelink2/Operations.scala @@ -10,22 +10,181 @@ class TLEdgeOut( extends TLEdgeParameters(client, manager) { // Transfers - def Acquire(x: Int) = () // A - def Release(x: Int) = () // C - def ReleaseData(x: Int) = () // C - def ProbeAck(x: Int) = () // C - def ProbeDataAck(x: Int) = () // C - def GrantAck(x: Int) = () // E + def Acquire(fromSource: UInt, toAddress: UInt, lgSize: UInt, growPermissions: UInt) = { + // !!! Monitor: lgSize >= beatBytes + // !!! Monitor: check address alignment + // !!! Monitor: check param values + val legal = manager.supportsAcquire(toAddress, lgSize) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.Acquire + a.param := growPermissions + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := SInt(-1).asUInt + a.data := UInt(0) + (legal, a) + } - // Accessors - def Get(x: Int) = () // A - def Put(x: Int) = () // A - def Atomic(x: Int) = () // A - def AccessAck(x: Int) = () // C - def AccessDataAck(x: Int) = () // C - - def Hint(x: Int) = () // A - def HintAck(x: Int) = () // C + def Release(fromSource: UInt, toAddress: UInt, lgSize: UInt, shrinkPermissions: UInt) = { + val legal = manager.supportsAcquire(toAddress, lgSize) + val c = new TLBundleC(bundle) + c.opcode := TLMessages.Release + c.param := shrinkPermissions + c.size := lgSize + c.source := fromSource + c.address := toAddress >> log2Up(manager.beatBytes) + c.data := UInt(0) + c.error := Bool(false) + (legal, c) + } + + def Release(fromSource: UInt, toAddress: UInt, lgSize: UInt, shrinkPermissions: UInt, data: UInt) = { + val legal = manager.supportsAcquire(toAddress, lgSize) + val c = new TLBundleC(bundle) + c.opcode := TLMessages.ReleaseData + c.param := shrinkPermissions + c.size := lgSize + c.source := fromSource + c.address := toAddress >> log2Up(manager.beatBytes) + c.data := data + c.error := Bool(false) + (legal, c) + } + + def ProbeAck(toAddress: UInt, lgSize: UInt, reportPermissions: UInt) = { + val c = new TLBundleC(bundle) + c.opcode := TLMessages.ProbeAck + c.param := reportPermissions + c.size := lgSize + c.source := UInt(0) + c.address := toAddress >> log2Up(manager.beatBytes) + c.data := UInt(0) + c.error := Bool(false) + c + } + + def ProbeAck(toAddress: UInt, lgSize: UInt, reportPermissions: UInt, data: UInt) = { + val c = new TLBundleC(bundle) + c.opcode := TLMessages.ProbeAckData + c.param := reportPermissions + c.size := lgSize + c.source := UInt(0) + c.address := toAddress >> log2Up(manager.beatBytes) + c.data := data + c.error := Bool(false) + c + } + + def GrantAck(toSink: UInt) = { + val e = new TLBundleE(bundle) + e.sink := toSink + e + } + + // Accesses + def Get(fromSource: UInt, toAddress: UInt, lgSize: UInt) = { + val legal = manager.supportsGet(toAddress, lgSize) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.Get + a.param := UInt(0) + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := fullMask(toAddress, lgSize) + a.data := UInt(0) + (legal, a) + } + + def Put(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt) = { + val legal = manager.supportsPutFull(toAddress, lgSize) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.PutFullData + a.param := UInt(0) + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := fullMask(toAddress, lgSize) + a.data := data + (legal, a) + } + + def Put(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt, wmask: UInt) = { + // !!! Monitor: check that wmask is contained in lgSize + val legal = manager.supportsPutPartial(toAddress, lgSize) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.PutPartialData + a.param := UInt(0) + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := wmask + a.data := data + (legal, a) + } + + def Arithmetic(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt, atomic: UInt) = { + val legal = manager.supportsArithmetic(toAddress, lgSize) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.ArithmeticData + a.param := atomic + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := fullMask(toAddress, lgSize) + a.data := data + (legal, a) + } + + def Logical(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt, atomic: UInt) = { + val legal = manager.supportsLogical(toAddress, lgSize) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.LogicalData + a.param := atomic + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := fullMask(toAddress, lgSize) + a.data := data + (legal, a) + } + + def Hint(fromSource: UInt, toAddress: UInt, lgSize: UInt, param: UInt) = { + val legal = manager.supportsHint(toAddress) + val a = new TLBundleA(bundle) + a.opcode := TLMessages.Hint + a.param := param + a.size := lgSize + a.source := fromSource + a.address := toAddress >> log2Up(manager.beatBytes) + a.wmask := fullMask(toAddress, lgSize) + a.data := UInt(0) + (legal, a) + } + + def AccessAck(toAddress: UInt, lgSize: UInt, error: Bool = Bool(false)) = { + val c = new TLBundleC(bundle) + c.opcode := TLMessages.AccessAck + c.param := UInt(0) + c.size := lgSize + c.source := UInt(0) + c.address := toAddress >> log2Up(manager.beatBytes) + c.data := UInt(0) + c.error := error + c + } + + def AccessAck(toAddress: UInt, lgSize: UInt, data: UInt) = { + val c = new TLBundleC(bundle) + c.opcode := TLMessages.AccessAckData + c.param := UInt(0) + c.size := lgSize + c.source := UInt(0) + c.address := toAddress >> log2Up(manager.beatBytes) + c.data := data + c.error := Bool(false) + c + } } class TLEdgeIn( @@ -34,18 +193,156 @@ class TLEdgeIn( extends TLEdgeParameters(client, manager) { // Transfers - def Probe(x: Int) = () // B - def Grant(x: Int) = () // D - def GrantData(x: Int) = () // D - def ReleaseAck(x: Int) = () // D + def Probe(fromAddress: UInt, toSource: UInt, lgSize: UInt, capPermissions: UInt) = { + val legal = client.supportsProbe(fromAddress, lgSize) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.Probe + b.param := capPermissions + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := fullMask(fromAddress, lgSize) + b.data := UInt(0) + (legal, b) + } - // Accessors - def Get(x: Int) = () // B - def Put(x: Int) = () // B - def Atomic(x: Int) = () // B - def AccessAck(x: Int) = () // D - def AccessDataAck(x: Int) = () // D + def Grant(fromSink: UInt, toSource: UInt, lgSize: UInt, capPermissions: UInt) = { + val d = new TLBundleD(bundle) + d.opcode := TLMessages.Grant + d.param := capPermissions + d.size := lgSize + d.source := toSource + d.sink := fromSink + d.data := UInt(0) + d.error := Bool(false) + d + } - def Hint(x: Int) = () // B - def HintAck(x: Int) = () // D + def GrantData(fromSink: UInt, toSource: UInt, lgSize: UInt, capPermissions: UInt, data: UInt) = { + val d = new TLBundleD(bundle) + d.opcode := TLMessages.GrantData + d.param := capPermissions + d.size := lgSize + d.source := toSource + d.sink := fromSink + d.data := data + d.error := Bool(false) + d + } + + def ReleaseAck(toSource: UInt, lgSize: UInt) = { + val d = new TLBundleD(bundle) + d.opcode := TLMessages.ReleaseAck + d.param := UInt(0) + d.size := lgSize + d.source := toSource + d.sink := UInt(0) + d.data := UInt(0) + d.error := Bool(false) + d + } + + // Accesses + def Get(fromAddress: UInt, toSource: UInt, lgSize: UInt) = { + val legal = client.supportsGet(toSource, lgSize) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.Get + b.param := UInt(0) + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := fullMask(fromAddress, lgSize) + b.data := UInt(0) + (legal, b) + } + + def Put(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt) = { + val legal = client.supportsPutFull(toSource, lgSize) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.PutFullData + b.param := UInt(0) + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := fullMask(fromAddress, lgSize) + b.data := data + (legal, b) + } + + def Put(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt, wmask: UInt) = { + val legal = client.supportsPutPartial(toSource, lgSize) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.PutPartialData + b.param := UInt(0) + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := wmask + b.data := data + (legal, b) + } + + def Arithmetic(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt, atomic: UInt) = { + val legal = client.supportsArithmetic(toSource, lgSize) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.ArithmeticData + b.param := atomic + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := fullMask(fromAddress, lgSize) + b.data := data + (legal, b) + } + + def Logical(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt, atomic: UInt) = { + val legal = client.supportsLogical(toSource, lgSize) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.LogicalData + b.param := atomic + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := fullMask(fromAddress, lgSize) + b.data := data + (legal, b) + } + + def Hint(fromAddress: UInt, toSource: UInt, lgSize: UInt, param: UInt) = { + val legal = client.supportsHint(toSource) + val b = new TLBundleB(bundle) + b.opcode := TLMessages.Hint + b.param := param + b.size := lgSize + b.source := toSource + b.address := fromAddress >> log2Up(manager.beatBytes) + b.wmask := fullMask(fromAddress, lgSize) + b.data := UInt(0) + (legal, b) + } + + + def AccessAck(toSource: UInt, lgSize: UInt, error: Bool = Bool(false)) = { + val d = new TLBundleD(bundle) + d.opcode := TLMessages.AccessAck + d.param := UInt(0) + d.size := lgSize + d.source := toSource + d.sink := UInt(0) + d.data := UInt(0) + d.error := error + d + } + + def AccessAck(toSource: UInt, lgSize: UInt, data: UInt) = { + val d = new TLBundleD(bundle) + d.opcode := TLMessages.AccessAckData + d.param := UInt(0) + d.size := lgSize + d.source := toSource + d.sink := UInt(0) + d.data := data + d.error := Bool(false) + d + } } diff --git a/uncore/src/main/scala/tilelink2/Parameters.scala b/uncore/src/main/scala/tilelink2/Parameters.scala index 5503b7fe..11afeee9 100644 --- a/uncore/src/main/scala/tilelink2/Parameters.scala +++ b/uncore/src/main/scala/tilelink2/Parameters.scala @@ -36,7 +36,7 @@ case class IdRange(start: Int, end: Int) def shift(x: Int) = IdRange(start+x, end+x) } -// An potentially empty inclusive range of 2-powers [min, max] +// An potentially empty inclusive range of 2-powers [min, max] (in bytes) case class TransferSizes(min: Int, max: Int) { def this(x: Int) = this(x, x) @@ -269,10 +269,19 @@ case class TLEdgeParameters( client: TLClientPortParameters, manager: TLManagerPortParameters) { + val maxTransfer = max(client.maxTransfer, manager.maxTransfer) + val maxLgSize = log2Up(maxTransfer) + val bundle = TLBundleParameters( addressBits = log2Up(manager.maxAddress + 1) - log2Up(manager.beatBytes), dataBits = manager.beatBytes * 8, sourceBits = log2Up(client.endSourceId), sinkBits = log2Up(manager.endSinkId), - sizeBits = log2Up(log2Up(max(client.maxTransfer, manager.maxTransfer))+1)) + sizeBits = log2Up(maxLgSize+1)) + + def addressMask(lgSize: UInt) = Vec.tabulate(maxLgSize) { UInt(_) < lgSize } .toBits.asUInt + def isAligned(address: UInt, lgSize: UInt) = (address & addressMask(lgSize)) === UInt(0) + +// !!! wrong: + def fullMask(address: UInt, lgSize: UInt) = UInt(0) }