riscv/rocket-chip
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Revert "Merge pull request #1027 from freechipsproject/dont-touch-hartid"

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This reverts commit 5232a29d7d, reversing
changes made to a2dc13669a.
This commit is contained in:
Henry Cook
2017-10-05 00:26:44 -07:00
parent 5a84564203
commit 45581e60f0
5 changed files with 3 additions and 25 deletions
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2
src/main/scala/system/ExampleRocketSystem.scala
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@ -6,7 +6,6 @@ import Chisel._
import freechips.rocketchip.config.Parameters
import freechips.rocketchip.coreplex._
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.util.DontTouch
/** Example Top with periphery devices and ports, and a Rocket coreplex */
class ExampleRocketSystem(implicit p: Parameters) extends RocketCoreplex
@ -26,4 +25,3 @@ class ExampleRocketSystemModule[+L <: ExampleRocketSystem](_outer: L) extends Ro
with HasMasterAXI4MMIOPortModuleImp
with HasSlaveAXI4PortModuleImp
with HasPeripheryBootROMModuleImp
with DontTouch

1
src/main/scala/system/TestHarness.scala
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@ -14,7 +14,6 @@ class TestHarness()(implicit p: Parameters) extends Module {
val dut = Module(LazyModule(new ExampleRocketSystem).module)
dut.reset := reset | dut.debug.ndreset
dut.dontTouchPorts()
dut.tieOffInterrupts()
dut.connectSimAXIMem()
dut.connectSimAXIMMIO()