riscv/rocket-chip
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Revert "Merge pull request #1027 from freechipsproject/dont-touch-hartid"

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This reverts commit 5232a29d7d, reversing
changes made to a2dc13669a.
This commit is contained in:
Henry Cook
2017-10-05 00:26:44 -07:00
parent 5a84564203
commit 45581e60f0
5 changed files with 3 additions and 25 deletions
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2
src/main/scala/rocket/HellaCache.scala
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@ -4,7 +4,6 @@
package freechips.rocketchip.rocket
import Chisel._
import chisel3.experimental.dontTouch
import freechips.rocketchip.config.{Parameters, Field}
import freechips.rocketchip.coreplex._
import freechips.rocketchip.diplomacy._
@ -185,7 +184,6 @@ class HellaCacheModule(outer: HellaCache) extends LazyModuleImp(outer)
implicit val edge = outer.node.edges.out(0)
val (tl_out, _) = outer.node.out(0)
val io = IO(new HellaCacheBundle(outer))
dontTouch(io.cpu.resp) // Users like to monitor these fields even if the core ignores some
private val fifoManagers = edge.manager.managers.filter(TLFIFOFixer.allUncacheable)
fifoManagers.foreach { m =>