riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

parameterize Hasti address and data bits

Browse Source
This commit is contained in:
Howard Mao
2016-04-29 17:49:26 -07:00
parent 64991d3947
commit 44740cb6b2
1 changed files with 6 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
junctions/src/main/scala/hasti.scala
View File

@@ -31,10 +31,14 @@ trait HastiConstants
def dgate(valid: Bool, b: UInt) = Fill(b.getWidth, valid) & b def dgate(valid: Bool, b: UInt) = Fill(b.getWidth, valid) & b
} }
case class HastiParameters(dataBits: Int, addrBits: Int)
case object HastiKey extends Field[HastiParameters]
trait HasHastiParameters { trait HasHastiParameters {
implicit val p: Parameters implicit val p: Parameters
val hastiAddrBits = 32 val hastiParams = p(HastiKey)
val hastiDataBits = 32 val hastiAddrBits = hastiParams.addrBits
val hastiDataBits = hastiParams.dataBits
} }
abstract class HastiModule(implicit val p: Parameters) extends Module abstract class HastiModule(implicit val p: Parameters) extends Module