From 42f1ae27fc35378456db5b8f18e1b22f938b6bfd Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Wed, 6 Sep 2017 16:07:58 -0700 Subject: [PATCH] Xbar: use the IdentityModule to encourage wider fanout --- src/main/scala/tilelink/Xbar.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/tilelink/Xbar.scala b/src/main/scala/tilelink/Xbar.scala index 8e0f184b..eb6d00dd 100644 --- a/src/main/scala/tilelink/Xbar.scala +++ b/src/main/scala/tilelink/Xbar.scala @@ -219,7 +219,7 @@ object TLXbar def fanout[T <: TLChannel](input: DecoupledIO[T], select: Seq[Bool]) = { val filtered = Wire(Vec(select.size, input)) for (i <- 0 until select.size) { - filtered(i).bits := input.bits + filtered(i).bits := IdentityModule(input.bits) // force fanout of wires filtered(i).valid := input.valid && select(i) } input.ready := Mux1H(select, filtered.map(_.ready))