riscv/rocket-chip
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fix DummyPTW response

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This commit is contained in:
Howard Mao 2016-01-20 11:39:40 -08:00
parent a59ff38b67
commit 428fa14601
1 changed files with 2 additions and 2 deletions
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4
groundtest/src/main/scala/tile.scala
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@ -61,9 +61,9 @@ class DummyPTW(n: Int)(implicit p: Parameters) extends CoreModule()(p) {
s2_resp.error := Bool(false) s2_resp.error := Bool(false)
s2_resp.pte.ppn := s2_ppn s2_resp.pte.ppn := s2_ppn
s2_resp.pte.reserved_for_software := UInt(0) s2_resp.pte.reserved_for_software := UInt(0)
s2_resp.pte.d := Bool(false) s2_resp.pte.d := Bool(true)
s2_resp.pte.r := Bool(false) s2_resp.pte.r := Bool(false)
s2_resp.pte.typ := UInt(2) s2_resp.pte.typ := UInt("b0101")
s2_resp.pte.v := Bool(true) s2_resp.pte.v := Bool(true)
io.requestors.zipWithIndex.foreach { case (requestor, i) => io.requestors.zipWithIndex.foreach { case (requestor, i) =>