diff --git a/Makefrag b/Makefrag
index e76bb737..39e01809 100644
--- a/Makefrag
+++ b/Makefrag
@@ -23,8 +23,6 @@ $(FIRRTL_JAR): $(shell find $(base_dir)/firrtl/src/main/scala -iname "*.scala")
 	$(MAKE) -C $(base_dir)/firrtl SBT="$(SBT)" root_dir=$(base_dir)/firrtl build-scala
 	touch $(FIRRTL_JAR)
 
-CHISEL_ARGS := --targetDir $(generated_dir)
-
 src_path = src/main/scala
 default_submodules = . hardfloat context-dependent-environments chisel3
 chisel_srcs = $(foreach submodule,$(default_submodules) $(ROCKETCHIP_ADDONS),$(shell find $(base_dir)/$(submodule)/$(src_path) -name "*.scala"))
diff --git a/emulator/Makefile b/emulator/Makefile
index 32ee7b60..9760f2d6 100644
--- a/emulator/Makefile
+++ b/emulator/Makefile
@@ -23,10 +23,7 @@ debug: $(emu_debug)
 clean:
 	rm -rf *.o *.a emulator-* $(generated_dir) $(generated_dir_debug) DVEfiles $(output_dir)
 
-test:
-	cd $(base_dir) && $(SBT) "~make $(CURDIR) run-fast $(CHISEL_ARGS)"
-
-.PHONY: default all debug clean test
+.PHONY: default all debug clean
 
 #--------------------------------------------------------------------
 # Run assembly tests and benchmarks
diff --git a/emulator/Makefrag-verilator b/emulator/Makefrag-verilator
index 1767f15b..f9e6856e 100644
--- a/emulator/Makefrag-verilator
+++ b/emulator/Makefrag-verilator
@@ -10,11 +10,11 @@ verilog_debug = $(generated_dir_debug)/$(long_name).v
 
 $(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(chisel_srcs) $(bootrom_img)
 	mkdir -p $(dir $@)
-	cd $(base_dir) && $(SBT) "run $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
+	cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
 
 $(generated_dir_debug)/%.fir $(generated_dir_debug)/%.prm $(generated_dir_debug)/%.d: $(chisel_srcs) $(bootrom_img)
 	mkdir -p $(dir $@)
-	cd $(base_dir) && $(SBT) "run $(generated_dir_debug) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
+	cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir_debug) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
 
 %.v: %.fir $(FIRRTL_JAR)
 	mkdir -p $(dir $@)
diff --git a/project/build.scala b/project/build.scala
index c8944562..80047920 100644
--- a/project/build.scala
+++ b/project/build.scala
@@ -32,7 +32,7 @@ object BuildSettings extends Build {
       a.split(" ")
     },
     unmanagedSourceDirectories in Compile ++= addons.value.map(baseDirectory.value / _ / "src/main/scala"),
-    mainClass in (Compile, run) := Some("rocketchip.RocketChipGenerator"),
+    mainClass in (Compile, run) := Some("rocketchip.Generator"),
     make := {
       val jobs = java.lang.Runtime.getRuntime.availableProcessors
       val (makeDir, target) = setMake.parsed
diff --git a/src/main/scala/groundtest/Generator.scala b/src/main/scala/groundtest/Generator.scala
index 72b55108..f5c6bb27 100644
--- a/src/main/scala/groundtest/Generator.scala
+++ b/src/main/scala/groundtest/Generator.scala
@@ -2,11 +2,7 @@
 
 package groundtest
 
-import Chisel._
-import util.Generator
-
-object GroundtestGenerator extends Generator
-{
+object Generator extends util.GeneratorApp {
   val longName = names.topModuleProject + "." + names.configs
   generateFirrtl
   generateTestSuiteMakefrags // TODO: Needed only for legacy make targets
diff --git a/src/main/scala/rocketchip/Generator.scala b/src/main/scala/rocketchip/Generator.scala
index fd9aa81d..ea7d212e 100644
--- a/src/main/scala/rocketchip/Generator.scala
+++ b/src/main/scala/rocketchip/Generator.scala
@@ -2,14 +2,12 @@
 
 package rocketchip
 
-import Chisel._
 import rocket.{XLen, UseVM, UseAtomics, UseCompressed, FPUKey}
-import util.Generator
 import scala.collection.mutable.LinkedHashSet
 
 /** A Generator for platforms containing Rocket Coreplexes */
-object RocketChipGenerator extends Generator
-{
+object Generator extends util.GeneratorApp {
+
   val rv64RegrTestNames = LinkedHashSet(
         "rv64ud-v-fcvt",
         "rv64ud-p-fdiv",
diff --git a/src/main/scala/unittest/Generator.scala b/src/main/scala/unittest/Generator.scala
index e50976d5..95e114d1 100644
--- a/src/main/scala/unittest/Generator.scala
+++ b/src/main/scala/unittest/Generator.scala
@@ -2,11 +2,7 @@
 
 package unittest
 
-import Chisel._
-import util.Generator
-
-object UnitTestGenerator extends Generator
-{
+object Generator extends util.GeneratorApp {
   val longName = names.topModuleProject + "." + names.configs
   generateFirrtl
   generateTestSuiteMakefrags // TODO: Needed only for legacy make targets
diff --git a/src/main/scala/util/GeneratorUtils.scala b/src/main/scala/util/GeneratorUtils.scala
index 3b91b578..8937e9e4 100644
--- a/src/main/scala/util/GeneratorUtils.scala
+++ b/src/main/scala/util/GeneratorUtils.scala
@@ -60,7 +60,7 @@ trait HasGeneratorUtilities {
 
 
 /** Standardized command line interface for Scala entry point */
-trait Generator extends App with HasGeneratorUtilities {
+trait GeneratorApp extends App with HasGeneratorUtilities {
   lazy val names: ParsedInputNames = {
     require(args.size == 5, "Usage: sbt> " + 
       "run TargetDir TopModuleProjectName TopModuleName " +
diff --git a/vsim/Makefrag-verilog b/vsim/Makefrag-verilog
index 12fb7678..0f078a21 100644
--- a/vsim/Makefrag-verilog
+++ b/vsim/Makefrag-verilog
@@ -10,7 +10,7 @@ verilog = $(generated_dir)/$(long_name).v
 
 $(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(chisel_srcs) $(bootrom_img)
 	mkdir -p $(dir $@)
-	cd $(base_dir) && $(SBT) "run $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
+	cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
 
 $(generated_dir)/$(long_name).v $(generated_dir)/$(long_name).conf : $(firrtl) $(FIRRTL_JAR)
 	mkdir -p $(dir $@)