riscv/rocket-chip
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use xlen parameter for ALU

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This commit is contained in:
Howard Mao 2015-11-30 18:04:44 -08:00
parent ec4ade988b
commit 40d68406d6
3 changed files with 3 additions and 2 deletions
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2
rocket

@ -1 +1 @@
Subproject commit 3dda614ea9883499ab38767d11d091c520e14af3 Subproject commit 7be550b4f6cbf73514019712fd8505e7106e4f39

1
src/main/scala/Configs.scala
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@ -276,6 +276,7 @@ class DefaultL2FPGAConfig extends Config(new WithL2Capacity64 ++ new WithL2Cache
class WithZscale extends Config( class WithZscale extends Config(
(pname,site,here) => pname match { (pname,site,here) => pname match {
case XLen => 32
case BuildZscale => { case BuildZscale => {
TestGeneration.addSuites(List(rv32ui("p"), rv32um("p"))) TestGeneration.addSuites(List(rv32ui("p"), rv32um("p")))
TestGeneration.addSuites(List(zscaleBmarks)) TestGeneration.addSuites(List(zscaleBmarks))

2
zscale

@ -1 +1 @@
Subproject commit b79c35bb316a857c0d5ce341b4f0e3317a4e512a Subproject commit ccf9bd37268d6c0237a426e40175d05a3b890802