actually cleared up tile ios
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696dd102eb
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@ -41,18 +41,28 @@ class Tile(resetSignal: Bool = null)(confIn: RocketConfiguration) extends Compon
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arbiter.io.requestor(0) <> dcache.io.mem
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arbiter.io.requestor(0) <> dcache.io.mem
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arbiter.io.requestor(1) <> icache.io.mem
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arbiter.io.requestor(1) <> icache.io.mem
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io.tilelink.acquire <> arbiter.io.mem.acquire
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io.tilelink.acquire.valid := arbiter.io.mem.acquire.valid
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io.tilelink.acquire_data <> dcache.io.mem.acquire_data
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io.tilelink.acquire.ready := arbiter.io.mem.acquire.ready
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io.tilelink.acquire.bits := arbiter.io.mem.acquire.bits
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io.tilelink.acquire_data.valid := dcache.io.mem.acquire_data.valid
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io.tilelink.acquire_data.ready := dcache.io.mem.acquire_data.ready
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io.tilelink.acquire_data.bits := dcache.io.mem.acquire_data.bits
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arbiter.io.mem.abort <> io.tilelink.abort
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arbiter.io.mem.abort <> io.tilelink.abort
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arbiter.io.mem.grant <> io.tilelink.grant
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arbiter.io.mem.grant <> io.tilelink.grant
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io.tilelink.grant_ack <> arbiter.io.mem.grant_ack
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io.tilelink.grant_ack.valid := arbiter.io.mem.grant_ack.valid
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io.tilelink.grant_ack.ready := arbiter.io.mem.grant_ack.ready
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io.tilelink.grant_ack.bits := arbiter.io.mem.grant_ack.bits
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dcache.io.mem.probe <> io.tilelink.probe
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dcache.io.mem.probe <> io.tilelink.probe
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io.tilelink.release <> dcache.io.mem.release
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io.tilelink.release.valid := dcache.io.mem.release.valid
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io.tilelink.release_data <> dcache.io.mem.release_data
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io.tilelink.release.ready := dcache.io.mem.release.ready
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io.tilelink.release.bits := dcache.io.mem.release.bits
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io.tilelink.release_data.valid := dcache.io.mem.release_data.valid
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io.tilelink.release_data.ready := dcache.io.mem.release_data.ready
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io.tilelink.release_data.bits := dcache.io.mem.release_data.bits
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val ioSubBundles = arbiter.io.getClass.getMethods.filter( x =>
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val ioSubBundles = io.tilelink.getClass.getMethods.filter( x =>
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classOf[DirectionalFIFOIO[Data]].isAssignableFrom(x.getReturnType)).map{ m =>
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classOf[ClientSourcedIO[Data]].isAssignableFrom(x.getReturnType)).map{ m =>
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m.invoke(arbiter.io).asInstanceOf[DirectionalFIFOIO[LogicalNetworkIO[Data]]] }
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m.invoke(io.tilelink).asInstanceOf[ClientSourcedIO[LogicalNetworkIO[Data]]] }
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ioSubBundles.foreach{ m =>
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ioSubBundles.foreach{ m =>
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m.bits.header.dst := UFix(0)
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m.bits.header.dst := UFix(0)
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m.bits.header.src := UFix(0)
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m.bits.header.src := UFix(0)
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