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coreplex: allow buffer chains on certain bus ports

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This commit is contained in:
Henry Cook
2017-08-30 17:57:52 -07:00
committed by Wesley W. Terpstra
parent 57d0360c35
commit 3bde9506c6
7 changed files with 74 additions and 53 deletions
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2
src/main/scala/coreplex/PeripheryBus.scala
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@ -48,5 +48,5 @@ trait HasPeripheryBus extends HasSystemBus {
val pbus = new PeripheryBus(pbusParams)
// The peripheryBus hangs off of systemBus; here we convert TL-UH -> TL-UL
pbus.fromSystemBus := sbus.toPeripheryBus
pbus.fromSystemBus := sbus.toPeripheryBus(nBuffers = 4)
}