TLRegMapper: emit a JSON file describing the register fields
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		| @@ -7,9 +7,12 @@ import freechips.rocketchip.config.Parameters | ||||
| import freechips.rocketchip.diplomacy._ | ||||
| import freechips.rocketchip.regmapper._ | ||||
| import freechips.rocketchip.interrupts._ | ||||
| import freechips.rocketchip.util.HeterogeneousBag | ||||
| import freechips.rocketchip.util.{HeterogeneousBag, ElaborationArtefacts} | ||||
| import scala.math.{min,max} | ||||
|  | ||||
| import org.json4s.JsonDSL._ | ||||
| import org.json4s.jackson.JsonMethods.{pretty, render} | ||||
|  | ||||
| case class TLRegisterNode( | ||||
|     address:     Seq[AddressSet], | ||||
|     device:      Device, | ||||
| @@ -80,6 +83,36 @@ case class TLRegisterNode( | ||||
|     bundleIn.b.valid := Bool(false) | ||||
|     bundleIn.c.ready := Bool(true) | ||||
|     bundleIn.e.ready := Bool(true) | ||||
|  | ||||
|     // Dump out the register map for documentation purposes. | ||||
|     val registerDescriptions = mapping.map { case (offset, seq) => | ||||
|       var currentBitOffset = 0 | ||||
|       s"regAt0x${offset.toHexString}" -> ( | ||||
|         ("description"    ->  "None Provided") ~ | ||||
|         ("addressOffset"  -> s"0x${offset.toHexString}") ~ | ||||
|           ("fields" -> seq.zipWithIndex.map { case (f, i) => { | ||||
|             val tmp = (f.description.map{ _.displayName }.getOrElse(s"unnamedRegField${i}") -> ( | ||||
|               ("description" -> f.description.map{_.description}.getOrElse("No Description Provided")) ~ | ||||
|                 ("bitOffset"   -> currentBitOffset) ~ | ||||
|                 ("bitWidth"    -> f.width) ~ | ||||
|                 ("resetMask"   -> f.description.map { d => if (d.resetType != RegFieldResetType.N) "all" else "none"}.getOrElse("none")) ~ | ||||
|                 ("resetValue"  -> f.description.map { _.resetValue}.getOrElse(0)) ~ | ||||
|                 ("headerName"  -> f.description.map { _.headerName}.getOrElse("")))) | ||||
|             currentBitOffset = currentBitOffset + f.width | ||||
|             tmp | ||||
|           }}))} | ||||
|  | ||||
|     val simpleDev = device.asInstanceOf[SimpleDevice] | ||||
|     val base = s"0x${address.head.base.toInt.toHexString}" | ||||
|     val json = ("peripheral" -> ( | ||||
|       ("displayName" -> s"deviceAt${base}") ~ | ||||
|       ("description" -> s"None Provided") ~ | ||||
|       ("baseAddress" -> base) ~ | ||||
|       ("regWidth" -> beatBytes) ~ | ||||
|       ("access" -> "rw") ~ // specified at field level | ||||
|       ("registers" -> registerDescriptions) | ||||
|     )) | ||||
|     ElaborationArtefacts.add(s"${base}.regmap.json", pretty(render(json))) | ||||
|   } | ||||
| } | ||||
|  | ||||
|   | ||||
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