riscv/rocket-chip
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Connect FMA to Hwacha pipes

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This commit is contained in:
Quan Nguyen 2013-11-19 20:54:47 -08:00
parent a662e85f2a
commit 3b109763ad
2 changed files with 7 additions and 2 deletions
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7
rocket/src/main/scala/core.scala
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@ -25,8 +25,6 @@ class Core(implicit conf: RocketConfiguration) extends Module
val fpu = Module(new FPU(2,3))
dpath.io.fpu <> fpu.io.dpath
ctrl.io.fpu <> fpu.io.ctrl
fpu.io.sfma.valid := Bool(false) // hook these up to coprocessor?
fpu.io.dfma.valid := Bool(false)
fpu
} else null
@ -43,4 +41,9 @@ class Core(implicit conf: RocketConfiguration) extends Module
ctrl.io.rocc <> io.rocc
dpath.io.rocc <> io.rocc
require(conf.fpu)
// Hookup the {S,D}FMA pipes
fpu.io.sfma <> io.rocc.cp_sfma
fpu.io.dfma <> io.rocc.cp_dfma
}

2
rocket/src/main/scala/rocc.scala
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@ -42,6 +42,8 @@ class RoCCInterface(implicit conf: RocketConfiguration) extends Bundle
val iptw = new TLBPTWIO
val dptw = new TLBPTWIO
val pptw = new TLBPTWIO
val cp_dfma = new ioFMA(65).flip
val cp_sfma = new ioFMA(33).flip
val busy = Bool(OUTPUT)
val interrupt = Bool(OUTPUT)