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coreplex: support multiple memory channels via diplomatic trickery

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This commit is contained in:
Wesley W. Terpstra
2017-01-19 14:42:02 -08:00
parent e7b35b4bb6
commit 3a5e5a65f8
7 changed files with 30 additions and 37 deletions
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2
src/main/scala/groundtest/Configs.scala
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@ -40,7 +40,7 @@ class MemtestStatelessConfig extends Config(
// Test ALL the things
class FancyMemtestConfig extends Config(
new WithNGenerators(1, 2) ++ new WithNCores(2) ++ new WithMemtest ++
new WithNMemoryChannels(1) ++ new WithNBanksPerMemChannel(4) ++ // !!! waiting on Chisel3 support for 2 channels
new WithNMemoryChannels(2) ++ new WithNBanksPerMemChannel(4) ++
new WithL2Cache ++ new GroundTestConfig)
class CacheFillTestConfig extends Config(