riscv/rocket-chip
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axi4: default should be GET_EFFECTS

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Wesley W. Terpstra 2016-11-14 15:19:39 -08:00
parent 0e30364f56
commit 385b5d5698
2 changed files with 2 additions and 1 deletions
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1
src/main/scala/rocketchip/Periphery.scala
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@ -168,6 +168,7 @@ trait PeripheryMasterAXI4Mem {
val axi4 = AXI4BlindOutputNode(AXI4SlavePortParameters( val axi4 = AXI4BlindOutputNode(AXI4SlavePortParameters(
slaves = Seq(AXI4SlaveParameters( slaves = Seq(AXI4SlaveParameters(
address = List(AddressSet(c_base, c_size-1)), address = List(AddressSet(c_base, c_size-1)),
regionType = RegionType.UNCACHED, // cacheable
executable = true, executable = true,
supportsWrite = TransferSizes(1, 256), // The slave supports 1-256 byte transfers supportsWrite = TransferSizes(1, 256), // The slave supports 1-256 byte transfers
supportsRead = TransferSizes(1, 256), supportsRead = TransferSizes(1, 256),

2
src/main/scala/uncore/axi4/Parameters.scala
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@ -8,7 +8,7 @@ import scala.math.max
case class AXI4SlaveParameters( case class AXI4SlaveParameters(
address: Seq[AddressSet], address: Seq[AddressSet],
regionType: RegionType.T = RegionType.UNCACHED, regionType: RegionType.T = RegionType.GET_EFFECTS,
executable: Boolean = false, // processor can execute from this memory executable: Boolean = false, // processor can execute from this memory
nodePath: Seq[BaseNode] = Seq(), nodePath: Seq[BaseNode] = Seq(),
supportsWrite: TransferSizes = TransferSizes.none, supportsWrite: TransferSizes = TransferSizes.none,