From 30415215b8c6b63cbcd813aaa3d3a53bef70e39e Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Thu, 23 Mar 2017 23:43:19 -0700 Subject: [PATCH] Don't check for exceptions on ScratchpadSlavePort accesses --- src/main/scala/rocket/DCache.scala | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/main/scala/rocket/DCache.scala b/src/main/scala/rocket/DCache.scala index b450627d..1c17ff42 100644 --- a/src/main/scala/rocket/DCache.scala +++ b/src/main/scala/rocket/DCache.scala @@ -181,10 +181,11 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) { // exceptions val s1_storegen = new StoreGen(s1_req.typ, s1_req.addr, UInt(0), wordBytes) - io.cpu.xcpt.ma.ld := s1_read && s1_storegen.misaligned - io.cpu.xcpt.ma.st := s1_write && s1_storegen.misaligned - io.cpu.xcpt.pf.ld := s1_read && tlb.io.resp.xcpt_ld - io.cpu.xcpt.pf.st := s1_write && tlb.io.resp.xcpt_st + val no_xcpt = Bool(usingDataScratchpad) && s1_req.phys /* slave port */ && s1_hit_state.isValid() + io.cpu.xcpt.ma.ld := !no_xcpt && s1_read && s1_storegen.misaligned + io.cpu.xcpt.ma.st := !no_xcpt && s1_write && s1_storegen.misaligned + io.cpu.xcpt.pf.ld := !no_xcpt && s1_read && tlb.io.resp.xcpt_ld + io.cpu.xcpt.pf.st := !no_xcpt && s1_write && tlb.io.resp.xcpt_st // load reservations val s2_lr = Bool(usingAtomics) && s2_req.cmd === M_XLR