From 2f7081aeaf83e134f42b803a4a4a7d05029fb889 Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <wesley@sifive.com>
Date: Thu, 6 Oct 2016 00:36:38 -0700
Subject: [PATCH] tilelink2: make mask generation reusable

---
 src/main/scala/uncore/tilelink2/Edges.scala   | 24 ++-----------------
 src/main/scala/uncore/tilelink2/package.scala | 22 +++++++++++++++++
 2 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/src/main/scala/uncore/tilelink2/Edges.scala b/src/main/scala/uncore/tilelink2/Edges.scala
index 4e9c3284..aac8338c 100644
--- a/src/main/scala/uncore/tilelink2/Edges.scala
+++ b/src/main/scala/uncore/tilelink2/Edges.scala
@@ -25,28 +25,8 @@ class TLEdge(
     }
   }
 
-  // This gets used everywhere, so make the smallest circuit possible ...
-  def mask(addr_lo: UInt, lgSize: UInt): UInt = {
-    val lgBytes = log2Ceil(manager.beatBytes)
-    val sizeOH = UIntToOH(lgSize, log2Up(manager.beatBytes))
-    def helper(i: Int): Seq[(Bool, Bool)] = {
-      if (i == 0) {
-        Seq((lgSize >= UInt(lgBytes), Bool(true)))
-      } else {
-        val sub = helper(i-1)
-        val size = sizeOH(lgBytes - i)
-        val bit = addr_lo(lgBytes - i)
-        val nbit = !bit
-        Seq.tabulate (1 << i) { j =>
-          val (sub_acc, sub_eq) = sub(j/2)
-          val eq = sub_eq && (if (j % 2 == 1) bit else nbit)
-          val acc = sub_acc || (size && eq)
-          (acc, eq)
-        }
-      }
-    }
-    Cat(helper(lgBytes).map(_._1).reverse)
-  }
+  def mask(addr_lo: UInt, lgSize: UInt): UInt =
+    maskGen(addr_lo, lgSize, manager.beatBytes)
 
   // !!! make sure to align addr_lo for PutPartials with 0 masks
   def addr_lo(mask: UInt, lgSize: UInt): UInt = {
diff --git a/src/main/scala/uncore/tilelink2/package.scala b/src/main/scala/uncore/tilelink2/package.scala
index afcb77a4..a0490d7e 100644
--- a/src/main/scala/uncore/tilelink2/package.scala
+++ b/src/main/scala/uncore/tilelink2/package.scala
@@ -17,4 +17,26 @@ package object tilelink2
       if (s >= w) x else helper(s+s, x | (x << s)(w-1,0))
     helper(1, x)
   }
+  // This gets used everywhere, so make the smallest circuit possible ...
+  def maskGen(addr_lo: UInt, lgSize: UInt, beatBytes: Int): UInt = {
+    val lgBytes = log2Ceil(beatBytes)
+    val sizeOH = UIntToOH(lgSize, log2Up(beatBytes))
+    def helper(i: Int): Seq[(Bool, Bool)] = {
+      if (i == 0) {
+        Seq((lgSize >= UInt(lgBytes), Bool(true)))
+      } else {
+        val sub = helper(i-1)
+        val size = sizeOH(lgBytes - i)
+        val bit = addr_lo(lgBytes - i)
+        val nbit = !bit
+        Seq.tabulate (1 << i) { j =>
+          val (sub_acc, sub_eq) = sub(j/2)
+          val eq = sub_eq && (if (j % 2 == 1) bit else nbit)
+          val acc = sub_acc || (size && eq)
+          (acc, eq)
+        }
+      }
+    }
+    Cat(helper(lgBytes).map(_._1).reverse)
+  }
 }