riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

add comments

Browse Source
This commit is contained in:
Andrew Waterman 2017-03-20 15:05:15 -07:00
parent 4c8be13a4d
commit 29e67279ba
1 changed files with 3 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/main/scala/rocket/PMP.scala
View File

@ -94,9 +94,11 @@ class PMP(implicit p: Parameters) extends PMPReg {
endsBeforeLower || beginsAfterUpper || (beginsAfterLower && endsBeforeUpper) endsBeforeLower || beginsAfterUpper || (beginsAfterLower && endsBeforeUpper)
} }
// returns whether this PMP completely contains, or contains none of, a page
def homogeneous(x: UInt, pgLevel: UInt, lgMaxSize: Int, prev: PMP): Bool = def homogeneous(x: UInt, pgLevel: UInt, lgMaxSize: Int, prev: PMP): Bool =
!cfg.p(0) || Mux(cfg.a(1), rangeHomogeneous(x, pgLevel, lgMaxSize, prev), pow2Homogeneous(x, pgLevel)) !cfg.p(0) || Mux(cfg.a(1), rangeHomogeneous(x, pgLevel, lgMaxSize, prev), pow2Homogeneous(x, pgLevel))
// returns whether this matching PMP fully contains the access
def aligned(x: UInt, lgSize: UInt, lgMaxSize: Int, prev: PMP): Bool = { def aligned(x: UInt, lgSize: UInt, lgMaxSize: Int, prev: PMP): Bool = {
val alignMask = ~(((BigInt(1) << lgMaxSize) - 1).U << lgSize)(lgMaxSize-1, 0) val alignMask = ~(((BigInt(1) << lgMaxSize) - 1).U << lgSize)(lgMaxSize-1, 0)
val rangeAligned = (prev.comparand(lgMaxSize-1, 0) & alignMask) === 0 && (comparand(lgMaxSize-1, 0) & alignMask) === 0 val rangeAligned = (prev.comparand(lgMaxSize-1, 0) & alignMask) === 0 && (comparand(lgMaxSize-1, 0) & alignMask) === 0
@ -104,6 +106,7 @@ class PMP(implicit p: Parameters) extends PMPReg {
Mux(cfg.a(1), rangeAligned, pow2Aligned) Mux(cfg.a(1), rangeAligned, pow2Aligned)
} }
// returns whether this PMP matches at least one byte of the access
def hit(x: UInt, lgSize: UInt, lgMaxSize: Int, prev: PMP): Bool = def hit(x: UInt, lgSize: UInt, lgMaxSize: Int, prev: PMP): Bool =
cfg.p(0) && Mux(cfg.a(1), rangeMatch(x, lgSize, lgMaxSize, prev), pow2Match(x, lgSize, lgMaxSize)) cfg.p(0) && Mux(cfg.a(1), rangeMatch(x, lgSize, lgMaxSize, prev), pow2Match(x, lgSize, lgMaxSize))
} }