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Merge pull request #851 from freechipsproject/chisel3clock

Use chisel3 Clock() method.
This commit is contained in:
Jim Lawson 2017-07-10 08:33:46 -07:00 committed by GitHub
commit 287219da06

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@ -8,7 +8,7 @@ import chisel3.util._
*/
class JTAGIO(hasTRSTn: Boolean = false) extends Bundle {
val TRSTn = if (hasTRSTn) Some(Output(Bool())) else None
val TCK = Clock(OUTPUT)
val TCK = Output(Clock())
val TMS = Output(Bool())
val TDI = Output(Bool())
val TDO = Input(new Tristate())