riscv/rocket-chip
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Fix Split for 0-width wires

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Andrew Waterman 2015-05-18 18:23:17 -07:00
parent d31b26c342
commit 254498042a
1 changed files with 1 additions and 1 deletions
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rocket/src/main/scala/util.scala
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@ -97,7 +97,7 @@ object Split
val w = x.getWidth val w = x.getWidth
def decreasing(x: Seq[Int]): Boolean = def decreasing(x: Seq[Int]): Boolean =
if (x.tail.isEmpty) true if (x.tail.isEmpty) true
else x.head > x.tail.head && decreasing(x.tail) else x.head >= x.tail.head && decreasing(x.tail)
require(decreasing(w :: n.toList)) require(decreasing(w :: n.toList))
w w
} }