From 23f7bab4f332f7e11bec99073e03039b36e78bdb Mon Sep 17 00:00:00 2001
From: Andrew Waterman <waterman@eecs.berkeley.edu>
Date: Fri, 25 Oct 2013 15:27:24 -0700
Subject: [PATCH] Reduce FMA pipeline depths

FMA QoR has improved enough to allow this change.
---
 rocket/src/main/scala/core.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rocket/src/main/scala/core.scala b/rocket/src/main/scala/core.scala
index 0bf3e561..e0e23c28 100644
--- a/rocket/src/main/scala/core.scala
+++ b/rocket/src/main/scala/core.scala
@@ -21,7 +21,7 @@ class Core(implicit conf: RocketConfiguration) extends Module
   val dpath = Module(new Datapath)
 
   val fpu: FPU = if (conf.fpu) {
-    val fpu = Module(new FPU(4,6))
+    val fpu = Module(new FPU(2,3))
     dpath.io.fpu <> fpu.io.dpath
     ctrl.io.fpu <> fpu.io.ctrl
     fpu.io.sfma.valid := Bool(false) // hook these up to coprocessor?