riscv/rocket-chip
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allow BACKEND/CONFIG be environment variables

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This commit is contained in:
Yunsup Lee 2014-09-17 10:48:56 -07:00
parent 484648d9c7
commit 221007595b
2 changed files with 4 additions and 4 deletions
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4
fsim/Makefile
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@ -15,8 +15,8 @@ mem_gen = $(base_dir)/fsim/fpga_mem_gen
sim_dir = .
output_dir = $(sim_dir)/output
BACKEND = fpga
CONFIG = DefaultFPGAConfig
BACKEND ?= fpga
CONFIG ?= DefaultFPGAConfig
include $(base_dir)/Makefrag
include $(sim_dir)/Makefrag

4
vsim/Makefile
View File

@ -15,8 +15,8 @@ mem_gen = $(base_dir)/vsim/vlsi_mem_gen
sim_dir = .
output_dir = $(sim_dir)/output
BACKEND = rocketchip.RocketChipBackend
CONFIG = DefaultVLSIConfig
BACKEND ?= rocketchip.RocketChipBackend
CONFIG ?= DefaultVLSIConfig
include $(base_dir)/Makefrag
include $(sim_dir)/Makefrag