riscv/rocket-chip
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fix typo rv64iu -> rv64ui

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This commit is contained in:
Howard Mao 2016-09-22 17:33:35 -07:00
parent 91aab2fabc
commit 22053289ef
1 changed files with 1 additions and 1 deletions
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src/main/scala/rocketchip/RocketTestSuite.scala
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@ -172,7 +172,7 @@ object DefaultTestSuites {
val emptyBmarks = new BenchmarkTestSuite("empty", val emptyBmarks = new BenchmarkTestSuite("empty",
"$(RISCV)/riscv64-unknown-elf/share/riscv-tests/benchmarks", LinkedHashSet.empty) "$(RISCV)/riscv64-unknown-elf/share/riscv-tests/benchmarks", LinkedHashSet.empty)
val singleRegression = new RegressionTestSuite(LinkedHashSet("rv64iu-p-simple")) val singleRegression = new RegressionTestSuite(LinkedHashSet("rv64ui-p-simple"))
val mtBmarks = new BenchmarkTestSuite("mt", "$(RISCV)/riscv64-unknown-elf/share/riscv-tests/mt", val mtBmarks = new BenchmarkTestSuite("mt", "$(RISCV)/riscv64-unknown-elf/share/riscv-tests/mt",
LinkedHashSet(((0 to 4).map("vvadd"+_) ++ LinkedHashSet(((0 to 4).map("vvadd"+_) ++