From 21b53672596d78a7e7d62646d4073881cf1c4666 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Thu, 12 Oct 2017 14:00:14 -0700 Subject: [PATCH] Expand C.UNIMP correctly (#1052) It was expanding to AMOADD.W, which is clearly not an illegal instruction. --- src/main/scala/rocket/RVC.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/rocket/RVC.scala b/src/main/scala/rocket/RVC.scala index 43d795a9..a20f74eb 100644 --- a/src/main/scala/rocket/RVC.scala +++ b/src/main/scala/rocket/RVC.scala @@ -60,7 +60,7 @@ class RVCDecoder(x: UInt)(implicit p: Parameters) { if (p(XLen) == 32) inst(Cat(lwImm, rs1p, UInt(2,3), rs2p, UInt(0x07,7)), rs2p, rs1p, rs2p) else ld } - def unimp = inst(Cat(lwImm >> 5, rs2p, rs1p, UInt(2,3), lwImm(4,0), UInt(0x2F,7)), rs2p, rs1p, rs2p) + def unimp = inst(Cat(lwImm >> 5, rs2p, rs1p, UInt(2,3), lwImm(4,0), UInt(0x3F,7)), rs2p, rs1p, rs2p) def sd = inst(Cat(ldImm >> 5, rs2p, rs1p, UInt(3,3), ldImm(4,0), UInt(0x23,7)), rs2p, rs1p, rs2p) def sw = inst(Cat(lwImm >> 5, rs2p, rs1p, UInt(2,3), lwImm(4,0), UInt(0x23,7)), rs2p, rs1p, rs2p) def fsd = inst(Cat(ldImm >> 5, rs2p, rs1p, UInt(3,3), ldImm(4,0), UInt(0x27,7)), rs2p, rs1p, rs2p)