From 1f8c4ba4ca3cb9f7ebb9aa1cf22a7420ef5dd846 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Wed, 14 Jun 2017 14:27:23 -0700 Subject: [PATCH] CoreplexNetwork: don't force a buffer on the coherence manager Let the l2Config.coherenceManager create its own appropriate buffers. This can matter if you need to make sure the buffer is in the right place in the hierarchy for hierarchical place and route. --- src/main/scala/coreplex/CoreplexNetwork.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/coreplex/CoreplexNetwork.scala b/src/main/scala/coreplex/CoreplexNetwork.scala index 66616078..4b88a09d 100644 --- a/src/main/scala/coreplex/CoreplexNetwork.scala +++ b/src/main/scala/coreplex/CoreplexNetwork.scala @@ -173,7 +173,7 @@ trait BankedL2CoherenceManagers extends CoreplexNetwork { val node = TLOutputNode() for (bank <- 0 until l2Config.nBanksPerChannel) { val offset = (bank * l2Config.nMemoryChannels) + channel - in := TLBuffer(BufferParams.flow, BufferParams.none)(l1tol2.node) + in := l1tol2.node node := TLFilter(AddressSet(offset * l1tol2_lineBytes, mask))(out) } node