diff --git a/uncore/src/main/scala/network.scala b/uncore/src/main/scala/network.scala
index 9de890b1..4905ffde 100644
--- a/uncore/src/main/scala/network.scala
+++ b/uncore/src/main/scala/network.scala
@@ -2,23 +2,23 @@ package uncore
 import Chisel._
 import scala.collection.mutable.Stack
 
-class PairedDataIO[M <: Data, D <: Data]()(m: => M, d: => D) extends Bundle {
-  val meta = Decoupled(m)
-  val data = Decoupled(d)
-  override def clone = { new PairedDataIO()(m,d).asInstanceOf[this.type] }
+class PairedDataIO[M <: Data, D <: Data](mType: M, dType: D) extends Bundle {
+  val meta = Decoupled(mType)
+  val data = Decoupled(dType)
+  override def clone = { new PairedDataIO(mType, dType).asInstanceOf[this.type] }
 }
 
-class PairedArbiterIO[M <: Data, D <: Data](n: Int)(m: => M, d: => D) extends Bundle {
-  val in  = Vec.fill(n){new PairedDataIO()(m,d)}.flip
-  val out = new PairedDataIO()(m,d)  
-  val meta_chosen = Bits(OUTPUT, log2Up(n)) 
-  val data_chosen = Bits(OUTPUT, log2Up(n)) 
-  override def clone = { new PairedArbiterIO(n)(m,d).asInstanceOf[this.type] }
+class PairedArbiterIO[M <: Data, D <: Data](mType: M, dType: D, n: Int) extends Bundle {
+  val in  = Vec.fill(n){new PairedDataIO(mType, dType)}.flip
+  val out = new PairedDataIO(mType, dType)  
+  val meta_chosen = UInt(OUTPUT, log2Up(n)) 
+  val data_chosen = UInt(OUTPUT, log2Up(n)) 
+  override def clone = { new PairedArbiterIO(mType, dType, n).asInstanceOf[this.type] }
 }
 
-class PairedLockingRRArbiter[M <: Data, D <: Data](n: Int, count: Int, needsLock: Option[M => Bool] = None)(meta: => M, data: => D) extends Module {
+class PairedLockingRRArbiter[M <: Data, D <: Data](mType: M, dType: D, n: Int, count: Int, needsLock: Option[M => Bool] = None) extends Module {
   require(isPow2(count))
-  val io = new PairedArbiterIO(n)(meta,data)
+  val io = new PairedArbiterIO(mType, dType, n)
   val locked  = if(count > 1) Reg(init=Bool(false)) else Bool(false)
   val lockIdx = if(count > 1) Reg(init=UInt(n-1)) else UInt(n-1)
   val grant = List.fill(n)(Bool())
@@ -68,10 +68,10 @@ class PairedLockingRRArbiter[M <: Data, D <: Data](n: Int, count: Int, needsLock
   when (io.out.meta.fire()) { last_grant := meta_chosen }
 }
 
-class PairedCrossbar[M <: Data, D <: Data](count: Int, needsLock: Option[PhysicalNetworkIO[M] => Bool] = None)(meta: => M, data: => D)(implicit conf: PhysicalNetworkConfiguration) extends PhysicalNetwork(conf) {
+class PairedCrossbar[M <: Data, D <: Data](mType: M, dType: D, count: Int, needsLock: Option[PhysicalNetworkIO[M] => Bool] = None)(implicit conf: PhysicalNetworkConfiguration) extends PhysicalNetwork(conf) {
   val io = new Bundle {
-    val in  = Vec.fill(conf.nEndpoints){new PairedDataIO()(new PhysicalNetworkIO()(meta),new PhysicalNetworkIO()(data))}.flip 
-    val out = Vec.fill(conf.nEndpoints){new PairedDataIO()(new PhysicalNetworkIO()(meta),new PhysicalNetworkIO()(data))}
+    val in  = Vec.fill(conf.nEndpoints){new PairedDataIO(new PhysicalNetworkIO(mType),new PhysicalNetworkIO(dType))}.flip 
+    val out = Vec.fill(conf.nEndpoints){new PairedDataIO(new PhysicalNetworkIO(mType),new PhysicalNetworkIO(dType))}
   }
 
   val metaRdyVecs = List.fill(conf.nEndpoints)(Vec.fill(conf.nEndpoints){Bool()})
@@ -79,7 +79,7 @@ class PairedCrossbar[M <: Data, D <: Data](count: Int, needsLock: Option[Physica
   val rdyVecs = metaRdyVecs zip dataRdyVecs
 
   io.out.zip(rdyVecs).zipWithIndex.map{ case ((out, rdys), i) => {
-    val rrarb = Module(new PairedLockingRRArbiter(conf.nEndpoints, count, needsLock)(io.in(0).meta.bits.clone, io.in(0).data.bits.clone))
+    val rrarb = Module(new PairedLockingRRArbiter(io.in(0).meta.bits.clone, io.in(0).data.bits.clone, conf.nEndpoints, count, needsLock))
     rrarb.io.in zip io.in zip rdys._1 zip rdys._2 map { case (((arb, in), meta_rdy), data_rdy) => {
       arb.meta.valid := in.meta.valid && (in.meta.bits.header.dst === UInt(i)) 
       arb.meta.bits := in.meta.bits
@@ -103,18 +103,18 @@ class PhysicalHeader(implicit conf: PhysicalNetworkConfiguration) extends Bundle
   val dst = UInt(width = conf.idBits)
 }
 
-class PhysicalNetworkIO[T <: Data]()(data: => T)(implicit conf: PhysicalNetworkConfiguration) extends Bundle {
-  val header = (new PhysicalHeader)
-  val payload = data
-  override def clone = { new PhysicalNetworkIO()(data).asInstanceOf[this.type] }
+class PhysicalNetworkIO[T <: Data](dType: T)(implicit conf: PhysicalNetworkConfiguration) extends Bundle {
+  val header = new PhysicalHeader
+  val payload = dType.clone
+  override def clone = { new PhysicalNetworkIO(dType).asInstanceOf[this.type] }
 }
 
 abstract class PhysicalNetwork(conf: PhysicalNetworkConfiguration) extends Module
 
-class BasicCrossbar[T <: Data](count: Int = 1)(data: => T)(implicit conf: PhysicalNetworkConfiguration) extends PhysicalNetwork(conf) {
+class BasicCrossbar[T <: Data](dType: T, count: Int = 1)(implicit conf: PhysicalNetworkConfiguration) extends PhysicalNetwork(conf) {
   val io = new Bundle {
-    val in  = Vec.fill(conf.nEndpoints){Decoupled((new PhysicalNetworkIO){data})}.flip 
-    val out = Vec.fill(conf.nEndpoints){Decoupled((new PhysicalNetworkIO){data})}
+    val in  = Vec.fill(conf.nEndpoints){Decoupled(new PhysicalNetworkIO(dType))}.flip 
+    val out = Vec.fill(conf.nEndpoints){Decoupled(new PhysicalNetworkIO(dType))}
   }
 
   val rdyVecs = List.fill(conf.nEndpoints)(Vec.fill(conf.nEndpoints)(Bool()))
@@ -148,7 +148,7 @@ class LogicalHeader(implicit conf: LogicalNetworkConfiguration) extends Bundle {
 
 object FIFOedLogicalNetworkIOWrapper {
   def apply[T <: Data](in: DecoupledIO[T], src: UInt = UInt(0), dst: UInt = UInt(0))(implicit conf: LogicalNetworkConfiguration) = {
-    val out = Decoupled((new LogicalNetworkIO){in.bits.clone}).asDirectionless
+    val out = Decoupled(new LogicalNetworkIO(in.bits.clone)).asDirectionless
     out.valid := in.valid
     out.bits.payload := in.bits
     out.bits.header.dst := dst
@@ -168,8 +168,8 @@ object FIFOedLogicalNetworkIOUnwrapper {
   }
 }
 
-class LogicalNetworkIO[T <: Data]()(data: => T)(implicit conf: LogicalNetworkConfiguration) extends Bundle {
+class LogicalNetworkIO[T <: Data](dType: T)(implicit conf: LogicalNetworkConfiguration) extends Bundle {
   val header = new LogicalHeader
-  val payload = data
-  override def clone = { new LogicalNetworkIO()(data).asInstanceOf[this.type] }
+  val payload = dType.clone
+  override def clone = { new LogicalNetworkIO(dType).asInstanceOf[this.type] }
 }
diff --git a/uncore/src/main/scala/tilelink.scala b/uncore/src/main/scala/tilelink.scala
index 6a3c8e20..425cbccd 100644
--- a/uncore/src/main/scala/tilelink.scala
+++ b/uncore/src/main/scala/tilelink.scala
@@ -91,32 +91,32 @@ class GrantAck(implicit val conf: TileLinkConfiguration) extends ClientSourcedMe
 trait DirectionalIO
 trait ClientSourcedIO extends DirectionalIO
 trait MasterSourcedIO extends DirectionalIO
-class ClientSourcedFIFOIO[T <: Data]()(data: => T) extends DecoupledIO(data) with ClientSourcedIO {
-  override def clone = { new ClientSourcedFIFOIO()(data).asInstanceOf[this.type] }
+class ClientSourcedFIFOIO[T <: Data](dType: T) extends DecoupledIO(dType) with ClientSourcedIO {
+  override def clone = { new ClientSourcedFIFOIO(dType).asInstanceOf[this.type] }
 }
-class ClientSourcedDataIO[M <: Data, D <: Data]()(meta: => M, data: => D)  extends PairedDataIO()(meta,data) with ClientSourcedIO {
-  override def clone = { new ClientSourcedDataIO()(meta,data).asInstanceOf[this.type] }
+class ClientSourcedDataIO[M <: Data, D <: Data](mType: M, dType: D) extends PairedDataIO(mType, dType) with ClientSourcedIO {
+  override def clone = { new ClientSourcedDataIO(mType, dType).asInstanceOf[this.type] }
 }
-class MasterSourcedFIFOIO[T <: Data]()(data: => T) extends DecoupledIO(data) with MasterSourcedIO {
+class MasterSourcedFIFOIO[T <: Data](dType: T) extends DecoupledIO(dType) with MasterSourcedIO {
   flip()
-  override def clone = { new MasterSourcedFIFOIO()(data).asInstanceOf[this.type] }
+  override def clone = { new MasterSourcedFIFOIO(dType).asInstanceOf[this.type] }
 }
-class MasterSourcedDataIO[M <: Data, D <: Data]()(meta: => M, data: => D)  extends PairedDataIO()(meta,data) with MasterSourcedIO {
+class MasterSourcedDataIO[M <: Data, D <: Data](mType: M, dType: D) extends PairedDataIO(mType, dType) with MasterSourcedIO {
   flip()
-  override def clone = { new MasterSourcedDataIO()(meta,data).asInstanceOf[this.type] }
+  override def clone = { new MasterSourcedDataIO(mType, dType).asInstanceOf[this.type] }
 }
 
 class UncachedTileLinkIO(implicit conf: TileLinkConfiguration) extends Bundle {
   implicit val ln = conf.ln
-  val acquire   = new ClientSourcedDataIO()(new LogicalNetworkIO()(new Acquire), new LogicalNetworkIO()(new AcquireData))
-  val grant     = new MasterSourcedFIFOIO()(new LogicalNetworkIO()(new Grant))
-  val grant_ack = new ClientSourcedFIFOIO()(new LogicalNetworkIO()(new GrantAck))
+  val acquire   = new ClientSourcedDataIO(new LogicalNetworkIO(new Acquire), new LogicalNetworkIO(new AcquireData))
+  val grant     = new MasterSourcedFIFOIO(new LogicalNetworkIO(new Grant))
+  val grant_ack = new ClientSourcedFIFOIO(new LogicalNetworkIO(new GrantAck))
   override def clone = { new UncachedTileLinkIO().asInstanceOf[this.type] }
 }
 
 class TileLinkIO(implicit conf: TileLinkConfiguration) extends UncachedTileLinkIO()(conf) { 
-  val probe     = new MasterSourcedFIFOIO()(new LogicalNetworkIO()(new Probe))
-  val release   = new ClientSourcedDataIO()(new LogicalNetworkIO()(new Release), new LogicalNetworkIO()(new ReleaseData))
+  val probe     = new MasterSourcedFIFOIO(new LogicalNetworkIO(new Probe))
+  val release   = new ClientSourcedDataIO(new LogicalNetworkIO(new Release), new LogicalNetworkIO(new ReleaseData))
   override def clone = { new TileLinkIO().asInstanceOf[this.type] }
 }
 
@@ -131,7 +131,7 @@ abstract class UncachedTileLinkIOArbiter(n: Int)(implicit conf: TileLinkConfigur
     val out = new UncachedTileLinkIO
   }
   def acqHasData(acq: LogicalNetworkIO[Acquire]) = co.messageHasData(acq.payload)
-  val acq_arb = Module(new PairedLockingRRArbiter(n, REFILL_CYCLES, acqHasData _)((new LogicalNetworkIO){new Acquire},(new LogicalNetworkIO){new AcquireData}))
+  val acq_arb = Module(new PairedLockingRRArbiter(new LogicalNetworkIO(new Acquire), new LogicalNetworkIO(new AcquireData), n, REFILL_CYCLES, acqHasData _))
   io.out.acquire <> acq_arb.io.out
   io.in.map(_.acquire).zipWithIndex.zip(acq_arb.io.in).map{ case ((req,id), arb) => {
     arb.data <> req.data
@@ -141,7 +141,7 @@ abstract class UncachedTileLinkIOArbiter(n: Int)(implicit conf: TileLinkConfigur
     req.meta.ready := arb.meta.ready
   }}
 
-  val grant_ack_arb = Module(new RRArbiter((new LogicalNetworkIO){new GrantAck},n))
+  val grant_ack_arb = Module(new RRArbiter(new LogicalNetworkIO(new GrantAck), n))
   io.out.grant_ack <> grant_ack_arb.io.out
   grant_ack_arb.io.in zip io.in map { case (arb, req) => arb <> req.grant_ack }
 
diff --git a/uncore/src/main/scala/uncore.scala b/uncore/src/main/scala/uncore.scala
index adf5f638..a24f309d 100644
--- a/uncore/src/main/scala/uncore.scala
+++ b/uncore/src/main/scala/uncore.scala
@@ -43,7 +43,7 @@ class L2CoherenceAgent(bankId: Int)(implicit conf: L2CoherenceAgentConfiguration
   alloc_arb.io.out.ready := acquire.meta.valid && !block_acquires
 
   // Handle probe request generation
-  val probe_arb = Module(new Arbiter((new LogicalNetworkIO){ new Probe }, trackerList.size))
+  val probe_arb = Module(new Arbiter(new LogicalNetworkIO(new Probe), trackerList.size))
   io.client.probe <> probe_arb.io.out
   probe_arb.io.in zip trackerList map { case (arb, t) => arb <> t.io.client.probe }
 
@@ -66,7 +66,7 @@ class L2CoherenceAgent(bankId: Int)(implicit conf: L2CoherenceAgentConfiguration
   release.data.ready := trackerList.map(_.io.client.release.data.ready).reduce(_||_)
 
   // Reply to initial requestor
-  val grant_arb = Module(new Arbiter((new LogicalNetworkIO){ new Grant }, trackerList.size))
+  val grant_arb = Module(new Arbiter(new LogicalNetworkIO(new Grant), trackerList.size))
   io.client.grant <> grant_arb.io.out
   grant_arb.io.in zip trackerList map { case (arb, t) => arb <> t.io.client.grant }