diff --git a/src/main/scala/uncore/tilelink2/RegisterRouterTest.scala b/src/main/scala/uncore/tilelink2/RegisterRouterTest.scala
index cdc9814e..8c226f01 100644
--- a/src/main/scala/uncore/tilelink2/RegisterRouterTest.scala
+++ b/src/main/scala/uncore/tilelink2/RegisterRouterTest.scala
@@ -133,7 +133,7 @@ object RRTestRequest
       val ovalid = progress && busy
       when (progress) {
         busy := Mux(busy, !oready, ivalid)
-        progress := !oready
+        progress := Mux(busy, !oready, !ivalid)
       } .otherwise {
         progress := lfsr(0)
       }