diff --git a/src/main/scala/Vlsi.scala b/src/main/scala/Vlsi.scala
index 925e792a..174016bd 100644
--- a/src/main/scala/Vlsi.scala
+++ b/src/main/scala/Vlsi.scala
@@ -6,7 +6,8 @@ import Chisel._
 import junctions._
 import uncore._
 
-class MemDessert(implicit val p: Parameters) extends Module {
+class MemDessert extends Module {
+  implicit val p = params
   val io = new MemDesserIO(p(HtifKey).width)
   val x = Module(new MemDesser(p(HtifKey).width))
   io.narrow <> x.io.narrow