From 9b41ad92ba6cadec52e389d41fb175d59b047d33 Mon Sep 17 00:00:00 2001
From: RainerWasserfuhr <rainerwasserfuhr+GitHub@gmail.com>
Date: Wed, 8 Oct 2014 01:46:48 +0200
Subject: [PATCH] Update README.md

typo?
---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index c725ba95..a70791f8 100644
--- a/README.md
+++ b/README.md
@@ -323,7 +323,7 @@ We use Synopsys VCS for Verilog simulation. We acknowledge that using a
 proprietary Verilog simulation tool for an open-source project is not
 ideal; we ask the community to help us move DirectC routines (VCS's way
 of gluing Verilog testbenches to arbitrary C/C++ code) into DPI/VPI
-routines so that we can make Verilog simulation work with a open-source
+routines so that we can make Verilog simulation work with an open-source
 Verilog simulator. In the meantime, you can use the C++ emulator to
 generate vcd waveforms, which you can view with an open-source waveform
 viewer such as GTKWave.