diff --git a/src/main/scala/uncore/tilelink2/Splitter.scala b/src/main/scala/uncore/tilelink2/Splitter.scala
index 42f1d095..25032fc0 100644
--- a/src/main/scala/uncore/tilelink2/Splitter.scala
+++ b/src/main/scala/uncore/tilelink2/Splitter.scala
@@ -51,7 +51,7 @@ class TLSplitter(policy: TLArbiter.Policy = TLArbiter.lowestIndexFirst)(implicit
       // Find a good mask for address decoding
       val port_addrs = edgesOut.map(_.manager.managers.map(_.address).flatten)
       val routingMask = AddressDecoder(port_addrs)
-      val route_addrs = port_addrs.map(_.map(_.widen(~routingMask)).distinct)
+      val route_addrs = port_addrs.map(seq => AddressSet.unify(seq.map(_.widen(~routingMask)).distinct))
       val outputPorts = route_addrs.map(seq => (addr: UInt) => seq.map(_.contains(addr)).reduce(_ || _))
 
       // We need an intermediate size of bundle with the widest possible identifiers