riscv/rocket-chip
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Error device: require explicit control of atomic and transfer sizes

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This commit is contained in:
Wesley W. Terpstra
2017-12-08 13:41:09 -08:00
parent 6a0150aad7
commit 18b8a61775
5 changed files with 14 additions and 7 deletions
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2
src/main/scala/coreplex/Configs.scala
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@ -24,7 +24,7 @@ class BaseCoreplexConfig extends Config ((site, here, up) => {
case PeripheryBusKey => PeripheryBusParams(beatBytes = site(XLen)/8, blockBytes = site(CacheBlockBytes))
case MemoryBusKey => MemoryBusParams(beatBytes = site(XLen)/8, blockBytes = site(CacheBlockBytes))
// Additional device Parameters
case ErrorParams => ErrorParams(Seq(AddressSet(0x3000, 0xfff)))
case ErrorParams => ErrorParams(Seq(AddressSet(0x3000, 0xfff)), maxAtomic=site(XLen)/8, maxTransfer=4096)
case BootROMParams => BootROMParams(contentFileName = "./bootrom/bootrom.img")
case DebugModuleParams => DefaultDebugModuleParams(site(XLen))
})