diff --git a/Makefrag b/Makefrag index fc427760..c6ec4e66 100644 --- a/Makefrag +++ b/Makefrag @@ -1,6 +1,4 @@ -# UCB use only --include $(base_dir)/Makefrag-boomchip --include $(base_dir)/Makefrag-hwachachip +-include $(generated_dir)/Makefrag # check RISCV environment variable ifndef RISCV @@ -55,391 +53,6 @@ $(DRAMSIM_OBJS): %.o: %.cpp $(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS) ar rcs $@ $^ -#-------------------------------------------------------------------- -# ISA Tests -#-------------------------------------------------------------------- - -tests_isa_dir = $(base_dir)/riscv-tools/riscv-tests/isa - -asm_p_tests = \ - rv64ui-p-add \ - rv64ui-p-addi \ - rv64ui-p-amoadd_d \ - rv64ui-p-amoadd_w \ - rv64ui-p-amoand_d \ - rv64ui-p-amoand_w \ - rv64ui-p-amoor_d \ - rv64ui-p-amoor_w \ - rv64ui-p-amoxor_d \ - rv64ui-p-amoxor_w \ - rv64ui-p-amoswap_d \ - rv64ui-p-amoswap_w \ - rv64ui-p-amomax_d \ - rv64ui-p-amomax_w \ - rv64ui-p-amomaxu_d \ - rv64ui-p-amomaxu_w \ - rv64ui-p-amomin_d \ - rv64ui-p-amomin_w \ - rv64ui-p-amominu_d \ - rv64ui-p-amominu_w \ - rv64ui-p-auipc \ - rv64ui-p-fence_i \ - rv64ui-p-sb \ - rv64ui-p-sd \ - rv64ui-p-sh \ - rv64ui-p-sw \ - rv64ui-p-addiw \ - rv64ui-p-addw \ - rv64ui-p-and \ - rv64ui-p-andi \ - rv64ui-p-beq \ - rv64ui-p-bge \ - rv64ui-p-bgeu \ - rv64ui-p-blt \ - rv64ui-p-bltu \ - rv64ui-p-bne \ - rv64ui-p-div \ - rv64ui-p-divu \ - rv64ui-p-divuw \ - rv64ui-p-divw \ - rv64ui-p-j \ - rv64ui-p-jal \ - rv64ui-p-jalr \ - rv64ui-p-lb \ - rv64ui-p-lbu \ - rv64ui-p-ld \ - rv64ui-p-lh \ - rv64ui-p-lhu \ - rv64ui-p-lui \ - rv64ui-p-lw \ - rv64ui-p-lwu \ - rv64ui-p-mul \ - rv64ui-p-mulh \ - rv64ui-p-mulhsu \ - rv64ui-p-mulhu \ - rv64ui-p-mulw \ - rv64ui-p-or \ - rv64ui-p-ori \ - rv64ui-p-rem \ - rv64ui-p-remu \ - rv64ui-p-remuw \ - rv64ui-p-remw \ - rv64ui-p-simple \ - rv64ui-p-sll \ - rv64ui-p-slli \ - rv64ui-p-slliw \ - rv64ui-p-sllw \ - rv64ui-p-slt \ - rv64ui-p-slti \ - rv64ui-p-sltiu \ - rv64ui-p-sltu \ - rv64ui-p-sra \ - rv64ui-p-srai \ - rv64ui-p-sraiw \ - rv64ui-p-sraw \ - rv64ui-p-srliw \ - rv64ui-p-srlw \ - rv64ui-p-sub \ - rv64ui-p-subw \ - rv64ui-p-xor \ - rv64ui-p-xori \ - rv64uf-p-ldst \ - rv64uf-p-move \ - rv64uf-p-fsgnj \ - rv64uf-p-fcmp \ - rv64uf-p-fcvt \ - rv64uf-p-fcvt_w \ - rv64uf-p-fclass \ - rv64uf-p-fadd \ - rv64uf-p-fmin \ - rv64uf-p-fmadd \ - rv64uf-p-fdiv \ - rv64uf-p-structural \ - rv64si-p-csr \ - rv64si-p-wfi \ - rv64si-p-illegal \ - rv64si-p-ma_fetch \ - rv64si-p-ma_addr \ - rv64si-p-scall \ - rv64si-p-sbreak \ - rv64ui-pm-lrsc \ - rv64mi-p-csr \ - rv64mi-p-mcsr \ - rv64mi-p-wfi \ - rv64mi-p-dirty \ - rv64mi-p-illegal \ - rv64mi-p-ma_addr \ - rv64mi-p-ma_fetch \ - rv64mi-pm-ipi \ - rv64mi-p-sbreak \ - rv64mi-p-scall \ - rv64mi-p-timer \ - -asm_pt_tests = \ - rv64ui-pt-add \ - rv64ui-pt-addi \ - rv64ui-pt-amoadd_d \ - rv64ui-pt-amoadd_w \ - rv64ui-pt-amoand_d \ - rv64ui-pt-amoand_w \ - rv64ui-pt-amoor_d \ - rv64ui-pt-amoor_w \ - rv64ui-pt-amoxor_d \ - rv64ui-pt-amoxor_w \ - rv64ui-pt-amoswap_d \ - rv64ui-pt-amoswap_w \ - rv64ui-pt-amomax_d \ - rv64ui-pt-amomax_w \ - rv64ui-pt-amomaxu_d \ - rv64ui-pt-amomaxu_w \ - rv64ui-pt-amomin_d \ - rv64ui-pt-amomin_w \ - rv64ui-pt-amominu_d \ - rv64ui-pt-amominu_w \ - rv64ui-pt-auipc \ - rv64ui-pt-fence_i \ - rv64ui-pt-sb \ - rv64ui-pt-sd \ - rv64ui-pt-sh \ - rv64ui-pt-sw \ - rv64ui-pt-addiw \ - rv64ui-pt-addw \ - rv64ui-pt-and \ - rv64ui-pt-andi \ - rv64ui-pt-beq \ - rv64ui-pt-bge \ - rv64ui-pt-bgeu \ - rv64ui-pt-blt \ - rv64ui-pt-bltu \ - rv64ui-pt-bne \ - rv64ui-pt-div \ - rv64ui-pt-divu \ - rv64ui-pt-divuw \ - rv64ui-pt-divw \ - rv64ui-pt-j \ - rv64ui-pt-jal \ - rv64ui-pt-jalr \ - rv64ui-pt-lb \ - rv64ui-pt-lbu \ - rv64ui-pt-ld \ - rv64ui-pt-lh \ - rv64ui-pt-lhu \ - rv64ui-pt-lui \ - rv64ui-pt-lw \ - rv64ui-pt-lwu \ - rv64ui-pt-mul \ - rv64ui-pt-mulh \ - rv64ui-pt-mulhsu \ - rv64ui-pt-mulhu \ - rv64ui-pt-mulw \ - rv64ui-pt-or \ - rv64ui-pt-ori \ - rv64ui-pt-rem \ - rv64ui-pt-remu \ - rv64ui-pt-remuw \ - rv64ui-pt-remw \ - rv64ui-pt-simple \ - rv64ui-pt-sll \ - rv64ui-pt-slli \ - rv64ui-pt-slliw \ - rv64ui-pt-sllw \ - rv64ui-pt-slt \ - rv64ui-pt-slti \ - rv64ui-pt-sltiu \ - rv64ui-pt-sltu \ - rv64ui-pt-sra \ - rv64ui-pt-srai \ - rv64ui-pt-sraiw \ - rv64ui-pt-sraw \ - rv64ui-pt-srliw \ - rv64ui-pt-srlw \ - rv64ui-pt-sub \ - rv64ui-pt-subw \ - rv64ui-pt-xor \ - rv64ui-pt-xori \ - rv64uf-pt-ldst \ - rv64uf-pt-move \ - rv64uf-pt-fsgnj \ - rv64uf-pt-fcmp \ - rv64uf-pt-fcvt \ - rv64uf-pt-fcvt_w \ - rv64uf-pt-fclass \ - rv64uf-pt-fadd \ - rv64uf-pt-fmin \ - rv64uf-pt-fmadd \ - rv64uf-pt-fdiv \ - rv64uf-pt-structural \ - -asm_v_tests = \ - rv64ui-v-add \ - rv64ui-v-addi \ - rv64ui-v-amoadd_d \ - rv64ui-v-amoadd_w \ - rv64ui-v-amoand_d \ - rv64ui-v-amoand_w \ - rv64ui-v-amoor_d \ - rv64ui-v-amoor_w \ - rv64ui-v-amoxor_d \ - rv64ui-v-amoxor_w \ - rv64ui-v-amoswap_d \ - rv64ui-v-amoswap_w \ - rv64ui-v-amomax_d \ - rv64ui-v-amomax_w \ - rv64ui-v-amomaxu_d \ - rv64ui-v-amomaxu_w \ - rv64ui-v-amomin_d \ - rv64ui-v-amomin_w \ - rv64ui-v-amominu_d \ - rv64ui-v-amominu_w \ - rv64ui-v-auipc \ - rv64ui-v-fence_i \ - rv64ui-v-sb \ - rv64ui-v-sd \ - rv64ui-v-sh \ - rv64ui-v-sw \ - rv64ui-v-addiw \ - rv64ui-v-addw \ - rv64ui-v-and \ - rv64ui-v-andi \ - rv64ui-v-beq \ - rv64ui-v-bge \ - rv64ui-v-bgeu \ - rv64ui-v-blt \ - rv64ui-v-bltu \ - rv64ui-v-bne \ - rv64ui-v-div \ - rv64ui-v-divu \ - rv64ui-v-divuw \ - rv64ui-v-divw \ - rv64ui-v-j \ - rv64ui-v-jal \ - rv64ui-v-jalr \ - rv64ui-v-lb \ - rv64ui-v-lbu \ - rv64ui-v-ld \ - rv64ui-v-lh \ - rv64ui-v-lhu \ - rv64ui-v-lui \ - rv64ui-v-lw \ - rv64ui-v-lwu \ - rv64ui-v-mul \ - rv64ui-v-mulh \ - rv64ui-v-mulhsu \ - rv64ui-v-mulhu \ - rv64ui-v-mulw \ - rv64ui-v-or \ - rv64ui-v-ori \ - rv64ui-v-rem \ - rv64ui-v-remu \ - rv64ui-v-remuw \ - rv64ui-v-remw \ - rv64ui-v-sll \ - rv64ui-v-slli \ - rv64ui-v-slliw \ - rv64ui-v-sllw \ - rv64ui-v-slt \ - rv64ui-v-slti \ - rv64ui-v-sltiu \ - rv64ui-v-sltu \ - rv64ui-v-sra \ - rv64ui-v-srai \ - rv64ui-v-sraiw \ - rv64ui-v-sraw \ - rv64ui-v-srliw \ - rv64ui-v-srlw \ - rv64ui-v-sub \ - rv64ui-v-subw \ - rv64ui-v-xor \ - rv64ui-v-xori \ - rv64uf-v-ldst \ - rv64uf-v-move \ - rv64uf-v-fsgnj \ - rv64uf-v-fcmp \ - rv64uf-v-fcvt \ - rv64uf-v-fcvt_w \ - rv64uf-v-fclass \ - rv64uf-v-fadd \ - rv64uf-v-fmin \ - rv64uf-v-fmadd \ - rv64uf-v-fdiv \ - rv64uf-v-structural \ - -#-------------------------------------------------------------------- -# Benchmark Tests -#-------------------------------------------------------------------- - -tests_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/benchmarks -bmarks = \ - median.riscv \ - multiply.riscv \ - qsort.riscv \ - towers.riscv \ - vvadd.riscv \ - mm.riscv \ - dhrystone.riscv \ - spmv.riscv \ - mt-vvadd.riscv \ - mt-matmul.riscv \ - #vec-vvadd.riscv \ - #vec-cmplxmult.riscv \ - #vec-matmul.riscv \ - -#-------------------------------------------------------------------- -# Multi-threaded Benchmark Tests -#-------------------------------------------------------------------- - -test_mt_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/mt -mt_bmarks = \ - vvadd0.riscv \ - vvadd1.riscv \ - vvadd2.riscv \ - vvadd3.riscv \ - vvadd4.riscv \ - ad_matmul.riscv \ - ae_matmul.riscv \ - af_matmul.riscv \ - ag_matmul.riscv \ - ai_matmul.riscv \ - ak_matmul.riscv \ - al_matmul.riscv \ - am_matmul.riscv \ - an_matmul.riscv \ - ap_matmul.riscv \ - aq_matmul.riscv \ - ar_matmul.riscv \ - at_matmul.riscv \ - av_matmul.riscv \ - ay_matmul.riscv \ - az_matmul.riscv \ - bb_matmul.riscv \ - bc_matmul.riscv \ - bf_matmul.riscv \ - bh_matmul.riscv \ - bj_matmul.riscv \ - bk_matmul.riscv \ - bm_matmul.riscv \ - bo_matmul.riscv \ - br_matmul.riscv \ - bs_matmul.riscv \ - ce_matmul.riscv \ - cf_matmul.riscv \ - cg_matmul.riscv \ - ci_matmul.riscv \ - ck_matmul.riscv \ - cl_matmul.riscv \ - cm_matmul.riscv \ - cs_matmul.riscv \ - cv_matmul.riscv \ - cy_matmul.riscv \ - dc_matmul.riscv \ - df_matmul.riscv \ - dm_matmul.riscv \ - do_matmul.riscv \ - dr_matmul.riscv \ - ds_matmul.riscv \ - du_matmul.riscv \ - dv_matmul.riscv \ - #-------------------------------------------------------------------- # Build Tests #-------------------------------------------------------------------- @@ -449,27 +62,3 @@ mt_bmarks = \ %.riscv.hex: % $(MAKE) -C $(dir $@) $(notdir $@) - -$(addprefix $(output_dir)/, $(addsuffix .hex, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests))): $(output_dir)/%.hex: $(tests_isa_dir)/%.hex - mkdir -p $(output_dir) - ln -fs $< $@ - -$(addprefix $(output_dir)/, $(addsuffix .hex, $(bmarks))): $(output_dir)/%.hex: $(tests_bmark_dir)/%.hex - mkdir -p $(output_dir) - ln -fs $< $@ - -$(addprefix $(output_dir)/, $(addsuffix .hex, $(mt_bmarks))): $(output_dir)/%.hex: $(test_mt_bmark_dir)/%.hex - mkdir -p $(output_dir) - ln -fs $< $@ - -$(addprefix $(output_dir)/, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests)): $(output_dir)/%: $(tests_isa_dir)/% - mkdir -p $(output_dir) - ln -fs $< $@ - -$(addprefix $(output_dir)/, $(bmarks)): $(output_dir)/%: $(tests_bmark_dir)/% - mkdir -p $(output_dir) - ln -fs $< $@ - -$(addprefix $(output_dir)/, $(mt_bmarks)): $(output_dir)/%: $(test_mt_bmark_dir)/% - mkdir -p $(output_dir) - ln -fs $< $@ diff --git a/emulator/Makefile b/emulator/Makefile index d578fc31..70a45ee5 100644 --- a/emulator/Makefile +++ b/emulator/Makefile @@ -10,6 +10,7 @@ all: emulator-$(CONFIG) debug: emulator-$(CONFIG)-debug include $(base_dir)/Makefrag +-include generated-src/Makefrag CXXFLAGS := $(CXXFLAGS) -std=c++11 -I$(RISCV)/include @@ -80,28 +81,10 @@ $(output_dir)/%.vpd: $(output_dir)/%.hex emulator-$(CONFIG)-debug vcd2vpd $@.vcd $@ > /dev/null & ./emulator-$(CONFIG)-debug +dramsim +max-cycles=$(timeout_cycles) +verbose -v$@.vcd +loadmem=$< none $(disasm) $(patsubst %.vpd,%.out,$@) && [ $$PIPESTATUS -eq 0 ] -run-asm-tests: $(addprefix $(output_dir)/, $(addsuffix .out, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests))) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $^; echo; -run-bmarks-test: $(addprefix $(output_dir)/, $(addsuffix .out, $(bmarks))) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $^; echo; -run-mt-tests: $(addprefix $(output_dir)/, $(addsuffix .out, $(mt_bmarks))) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $^; echo; +run: run-asm-tests run-bmark-tests +run-debug: run-asm-tests-debug run-bmark-tests-debug +run-fast: run-asm-tests-fast run-bmark-tests-fast -run-asm-tests-debug: $(addprefix $(output_dir)/, $(addsuffix .vpd, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests))) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $(patsubst %.vpd,%.out,$^); echo; -run-bmarks-test-debug: $(addprefix $(output_dir)/, $(addsuffix .vpd, $(bmarks))) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $(patsubst %.vpd,%.out,$^); echo; -run-mt-tests-debug: $(addprefix $(output_dir)/, $(addsuffix .vpd, $(mt_bmarks))) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $(patsubst %.vpd,%.out,$^); echo; - -# UCB use only --include Makefrag-boomchip --include Makefrag-hwachachip - -run: run-asm-tests run-bmarks-test -run-debug: run-asm-tests-debug run-bmarks-test-debug -run-fast: $(addprefix $(output_dir)/, $(addsuffix .run, $(asm_p_tests) $(asm_v_tests) $(bmarks))) - -.PHONY: run-asm-tests run-bmarks-test run-mt-tests -.PHONY: run-asm-tests-debug run-bmarks-test-debug run-mt-tests-debug +.PHONY: run-asm-tests run-bmarks-test +.PHONY: run-asm-tests-debug run-bmark-tests-debug .PHONY: run run-debug run-fast diff --git a/src/main/scala/PublicConfigs.scala b/src/main/scala/Configs.scala similarity index 92% rename from src/main/scala/PublicConfigs.scala rename to src/main/scala/Configs.scala index 83b0a0f2..8dc30a22 100644 --- a/src/main/scala/PublicConfigs.scala +++ b/src/main/scala/Configs.scala @@ -6,13 +6,17 @@ import Chisel._ import uncore._ import rocket._ import rocket.Util._ +import zscale._ import scala.math.max +import DefaultTestSuites._ class DefaultConfig extends ChiselConfig ( topDefinitions = { (pname,site,here) => type PF = PartialFunction[Any,Any] def findBy(sname:Any):Any = here[PF](site[Any](sname))(pname) pname match { + // + case UseZscale => false //HTIF Parameters case HTIFWidth => Dump("HTIF_WIDTH", 16) case HTIFNSCR => 64 @@ -75,8 +79,13 @@ class DefaultConfig extends ChiselConfig ( case BuildL2CoherenceManager => () => Module(new L2BroadcastHub, { case InnerTLId => "L1ToL2"; case OuterTLId => "L2ToMC" }) //Tile Constants - case BuildTiles => + case BuildTiles => { + TestGeneration.addSuites(rv64.map(_("p")) ++ rv64u.map(_("pt")) ++ List(bmarks)) + if(site(UseVM)) TestGeneration.addSuites(rv64u.map(_("v"))) + if(!site(FDivSqrt)) TestGeneration.addSuites(List(rv64ufNoDiv("p"), rv64ufNoDiv("pt"))) + if(site(NTiles) > 1) TestGeneration.addSuite(mtBmarks) List.fill(site(NTiles)){ (r:Bool) => Module(new RocketTile(resetSignal = r), {case TLId => "L1ToL2"}) } + } case BuildRoCC => None case NDCachePorts => 2 + (if(site(BuildRoCC).isEmpty) 0 else 1) case NPTWPorts => 2 + (if(site(BuildRoCC).isEmpty) 0 else 3) @@ -198,6 +207,18 @@ class DefaultL2VLSIConfig extends ChiselConfig(new WithL2Cache ++ new DefaultVLS class DefaultL2CPPConfig extends ChiselConfig(new WithL2Cache ++ new DefaultCPPConfig) class DefaultL2FPGAConfig extends ChiselConfig(new WithL2Capacity64 ++ new WithL2Cache ++ new DefaultFPGAConfig) +class WithZscale extends ChiselConfig( + (pname,site,here) => pname match { + case BuildZscale => { + TestGeneration.addSuites(List(rv32ui("p"), rv32um("p"))) + (r: Bool) => Module(new Zscale(r), {case TLId => "L1ToL2"}) + } + case UseZscale => true + } +) + +class ZscaleConfig extends ChiselConfig(new WithZscale ++ new DefaultConfig) + class FPGAConfig extends ChiselConfig ( (pname,site,here) => pname match { case UseBackupMemoryPort => false diff --git a/src/main/scala/RocketChip.scala b/src/main/scala/RocketChip.scala index 7634587a..b8f0561d 100644 --- a/src/main/scala/RocketChip.scala +++ b/src/main/scala/RocketChip.scala @@ -67,12 +67,19 @@ class MultiChannelTopIO extends BasicTopIO with TopLevelParameters { //TODO: Remove this wrapper once multichannel DRAM controller is provided class Top extends Module with TopLevelParameters { val io = new TopIO - val temp = Module(new MultiChannelTop) - val arb = Module(new MemIOArbiter(nMemChannels)) - arb.io.inner <> temp.io.mem - io.mem <> arb.io.outer - io.mem_backup_ctrl <> temp.io.mem_backup_ctrl - io.host <> temp.io.host + if(!params(UseZscale)) { + val temp = Module(new MultiChannelTop) + val arb = Module(new MemIOArbiter(nMemChannels)) + arb.io.inner <> temp.io.mem + io.mem <> arb.io.outer + io.mem_backup_ctrl <> temp.io.mem_backup_ctrl + io.host <> temp.io.host + } else { + val temp = Module(new ZscaleTop) + io.host <> temp.io.host + } + + TestGeneration.generateMakefrag } class MultiChannelTop extends Module with TopLevelParameters { diff --git a/src/main/scala/Testing.scala b/src/main/scala/Testing.scala new file mode 100644 index 00000000..67fd6917 --- /dev/null +++ b/src/main/scala/Testing.scala @@ -0,0 +1,120 @@ +// See LICENSE for license details. + +package rocketchip + +import Chisel._ + +abstract class RocketTestSuite { + val dir: String + val makeTargetName: String + val names: Set[String] + def postScript = s""" + +$$(addprefix $$(output_dir)/, $$(addsuffix .hex, $$($makeTargetName))): $$(output_dir)/%.hex: $dir/%.hex +\tmkdir -p $$(output_dir) +\tln -fs $$< $$@ + +$$(addprefix $$(output_dir)/, $$($makeTargetName)): $$(output_dir)/%: $dir/% +\tmkdir -p $$(output_dir) +\tln -fs $$< $$@ + +run-$makeTargetName: $$(addprefix $$(output_dir)/, $$(addsuffix .out, $$($makeTargetName))) +\t@echo; perl -ne 'print " [$$$$1] $$$$ARGV \\t$$$$2\\n" if /\\*{3}(.{8})\\*{3}(.*)/' $$^; echo; + +run-$makeTargetName-debug: $$(addprefix $$(output_dir)/, $$(addsuffix .vpd, $$($makeTargetName))) +\t@echo; perl -ne 'print " [$$$$1] $$$$ARGV \\t$$$$2\\n" if /\\*{3}(.{8})\\*{3}(.*)/' $$(patsubst %.vpd,%.out,$$^); echo; +""" +} + +class AssemblyTestSuite(makePrefix: String, toolsPrefix: String, val names: Set[String])(envName: String) extends RocketTestSuite { + val dir = "$(base_dir)/riscv-tools/riscv-tests/isa" + val makeTargetName = makePrefix + "-" + envName + "-asm-tests" + override def toString = s"$makeTargetName = \\\n" + names.map(n => s"\t$toolsPrefix-$envName-$n").mkString(" \\\n") + postScript +} + +class BenchmarkTestSuite(makePrefix: String, val dir: String, val names: Set[String]) extends RocketTestSuite { + val makeTargetName = makePrefix + "-bmark-tests" + override def toString = s"$makeTargetName = \\\n" + names.map(n => s"\t$n.riscv").mkString(" \\\n") + postScript +} + +object TestGeneration extends FileSystemUtilities{ + import scala.collection.mutable.HashMap + val asmSuites = new HashMap[String,AssemblyTestSuite]() + val bmarkSuites = new HashMap[String,BenchmarkTestSuite]() + + def addSuite(s: RocketTestSuite) { + s match { + case a: AssemblyTestSuite => asmSuites += (a.makeTargetName -> a) + case b: BenchmarkTestSuite => bmarkSuites += (b.makeTargetName -> b) + } + } + + def addSuites(s: Seq[RocketTestSuite]) { s.foreach(addSuite) } + + def generateMakefrag { + def gen(kind: String, s: Seq[RocketTestSuite]) = { + if(s.length > 0) { + val targets = s.map(t => s"$$(${t.makeTargetName})").mkString(" ") + s.map(_.toString).mkString("\n") + s""" +run-$kind-tests: $$(addprefix $$(output_dir)/, $$(addsuffix .out, $targets)) +\t@echo; perl -ne 'print " [$$$$1] $$$$ARGV \\t$$$$2\\n" if /\\*{3}(.{8})\\*{3}(.*)/' $$^; echo; +run-$kind-tests-debug: $$(addprefix $$(output_dir)/, $$(addsuffix .vpd, $targets)) +\t@echo; perl -ne 'print " [$$$$1] $$$$ARGV \\t$$$$2\\n" if /\\*{3}(.{8})\\*{3}(.*)/' $$(patsubst %.vpd,%.out,$$^); echo; +run-$kind-fast: $$(addprefix $$(output_dir)/, $$(addsuffix .run, $targets)) +\t@echo; perl -ne 'print " [$$$$1] $$$$ARGV \\t$$$$2\\n" if /\\*{3}(.{8})\\*{3}(.*)/' $$^; echo; +""" + } else { "\n" } + } + + val f = createOutputFile("Makefrag") + f.write(List(gen("asm", asmSuites.values.toSeq), gen("bmark", bmarkSuites.values.toSeq)).mkString("\n")) + f.close + } +} + +object DefaultTestSuites { + val rv32uiNames = Set( + "simple", "add", "addi", "and", "andi", "auipc", "beq", "bge", "bgeu", "blt", "bltu", "bne", "fence_i", + "j", "jal", "jalr", "lb", "lbu", "lh", "lhu", "lui", "lw", "or", "ori", "sb", "sh", "sw", "sll", "slli", + "slt", "slti", "sra", "srai", "srl", "srli", "sub", "xor", "xori") + val rv32ui = new AssemblyTestSuite("rv32ui", "rv32ui", rv32uiNames)(_) + + val rv32umNames = Set("mul", "mulh", "mulhsu", "mulhu", "div", "divu", "rem", "remu") + val rv32um = new AssemblyTestSuite("rv32um", "rv32ui", rv32umNames)(_) + + val rv32uaNames = Set("amoadd_w", "amoand_w", "amoor_w", "amoxor_w", "amoswap_w", "amomax_w", "amomaxu_w", "amomin_w", "amominu_w") + val rv32ua = new AssemblyTestSuite("rv32ua", "rv32ui", rv32uaNames)(_) + + val rv64uiNames = Set("addw", "addiw", "ld", "lwu", "sd", "slliw", "sllw", "sltiu", "sltu", "sraiw", "sraw", "srliw", "srlw", "subw") + val rv64ui = new AssemblyTestSuite("rv64ui", "rv64ui", rv32uiNames ++ rv64uiNames)(_) + + val rv64umNames = Set("divuw", "divw", "mulw", "remuw", "remw") + val rv64um = new AssemblyTestSuite("rv64um", "rv64ui", rv32umNames ++ rv64umNames)(_) + + val rv64uaNames = rv32uaNames.map(_.replaceAll("_w","_d")) + val rv64ua = new AssemblyTestSuite("rv64ua", "rv64ui", rv32uaNames ++ rv64uaNames)(_) + + val rv64ufNames = Set("ldst", "move", "fsgnj", "fcmp", "fcvt", "fcvt_w", "fclass", "fadd", "fdiv", "fmin", "fmadd", "structural") + val rv64uf = new AssemblyTestSuite("rv64uf", "rv64uf", rv64ufNames)(_) + val rv64ufNoDiv = new AssemblyTestSuite("rv64uf", "rv64uf", rv64ufNames - "fdiv")(_) + + val rv64siNames = Set("csr", "illegal", "ma_fetch", "ma_addr", "scall", "sbreak", "wfi") + val rv64si = new AssemblyTestSuite("rv64si", "rv64si", rv64siNames)(_) + + val rv64miNames = Set("csr", "mcsr", "wfi", "dirty", "illegal", "ma_addr", "ma_fetch", "sbreak", "scall", "timer") + val rv64mi = new AssemblyTestSuite("rv64mi", "rv64mi", rv64miNames)(_) + + // TODO: "rv64ui-pm-lrsc", "rv64mi-pm-ipi", + + val rv64u = List(rv64ui, rv64um, rv64ua, rv64uf) + val rv64 = rv64u ++ List(rv64si, rv64mi) + + val bmarks = new BenchmarkTestSuite("basic", "$(base_dir)/riscv-tools/riscv-tests/benchmarks", Set( + "median", "multiply", "qsort", "towers", "vvadd", "mm", "dhrystone", "spmv", "mt-vvadd", "mt-matmul")) + + val mtBmarks = new BenchmarkTestSuite("mt", "$(base_dir)/riscv-tools/riscv-tests/mt", + ((0 to 4).map("vvadd"+_) ++ + List("ad","ae","af","ag","ai","ak","al","am","an","ap","aq","ar","at","av","ay","az", + "bb","bc","bf","bh","bj","bk","bm","bo","br","bs","ce","cf","cg","ci","ck","cl", + "cm","cs","cv","cy","dc","df","dm","do","dr","ds","du","dv").map(_+"_matmul")).toSet) +} diff --git a/src/main/scala/ZscaleChip.scala b/src/main/scala/ZscaleChip.scala index ec9beeab..0f5b9ec2 100644 --- a/src/main/scala/ZscaleChip.scala +++ b/src/main/scala/ZscaleChip.scala @@ -7,6 +7,9 @@ import uncore._ import rocket._ import zscale._ +case object UseZscale extends Field[Boolean] +case object BuildZscale extends Field[(Bool) => Zscale] + class ZscaleSystem extends Module { val io = new Bundle { val host = new HTIFIO @@ -18,7 +21,7 @@ class ZscaleSystem extends Module { val corereset = new POCIIO } - val core = Module(new Zscale(io.host.reset), {case TLId => "L1ToL2"}) + val core = params(BuildZscale)(io.host.reset) val bootmem_afn = (addr: UInt) => addr(31, 14) === UInt(0) diff --git a/vsim/Makefrag-sim b/vsim/Makefrag-sim index 3bbd9746..826999f8 100644 --- a/vsim/Makefrag-sim +++ b/vsim/Makefrag-sim @@ -2,28 +2,12 @@ # Run #-------------------------------------------------------------------- -# UCB use only --include $(base_dir)/vsim/Makefrag-sim-refchip - -asm_tests_out = $(foreach test, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests), $(output_dir)/$(test).out) -bmarks_out = $(foreach test, $(bmarks), $(output_dir)/$(test).out) -mt_bmarks_out = $(foreach test, $(mt_bmarks), $(output_dir)/$(test).out) - -asm_tests_vcd = $(foreach test, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests), $(output_dir)/$(test).vcd) -bmarks_vcd = $(foreach test, $(bmarks), $(output_dir)/$(test).vcd) -mt_bmarks_vcd = $(foreach test, $(mt_bmarks), $(output_dir)/$(test).vcd) - -asm_tests_vpd = $(foreach test, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests), $(output_dir)/$(test).vpd) -bmarks_vpd = $(foreach test, $(bmarks), $(output_dir)/$(test).vpd) -mt_bmarks_vpd = $(foreach test, $(mt_bmarks), $(output_dir)/$(test).vpd) - -asm_tests_saif = $(foreach test, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests), $(output_dir)/$(test).saif) -bmarks_saif = $(foreach test, $(bmarks), $(output_dir)/$(test).saif) -mt_bmarks_saif = $(foreach test, $(mt_bmarks), $(output_dir)/$(test).saif) - $(sim_dir)/dramsim2_ini: ln -s $(base_dir)/emulator/dramsim2_ini $(sim_dir)/dramsim2_ini +$(output_dir)/%.run: $(output_dir)/%.hex $(sim_dir)/dramsim2_ini $(simv) + cd $(sim_dir) && $(exec_simv) +dramsim +verbose +max-cycles=$(timeout_cycles) +loadmem=$< 2> /dev/null 2> $@ && [ $$PIPESTATUS -eq 0 ] + $(output_dir)/%.out: $(output_dir)/%.hex $(sim_dir)/dramsim2_ini $(simv) cd $(sim_dir) && $(exec_simv) +dramsim +verbose +max-cycles=$(timeout_cycles) +loadmem=$< $(disasm) $@ && [ $$PIPESTATUS -eq 0 ] @@ -36,35 +20,12 @@ $(output_dir)/%.vpd: $(output_dir)/%.hex $(sim_dir)/dramsim2_ini $(simv_debug) $(output_dir)/%.saif: $(output_dir)/%.hex $(sim_dir)/dramsim2_ini $(simv_debug) cd $(sim_dir) && rm -f $(output_dir)/pipe-$*.vcd && vcd2saif -input $(output_dir)/pipe-$*.vcd -pipe "$(exec_simv_debug) +dramsim +verbose +vcdfile=$(output_dir)/pipe-$*.vcd +max-cycles=$(bmark_timeout_cycles) +loadmem=$<" -output $@ > $(patsubst %.saif,%.out,$@) 2>&1 -run-asm-tests: $(asm_tests_out) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(asm_tests_out); echo; - -run-bmarks-test: $(bmarks_out) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(bmarks_out); echo; - -run-mt-tests: $(mt_bmarks_out) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(mt_bmarks_out); echo; - -run-asm-tests-debug: $(asm_tests_vpd) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(asm_tests_out); echo; - -run-bmarks-test-debug: $(bmarks_vpd) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(bmarks_out); echo; - -run-mt-tests-debug: $(mt_bmarks_vpd) - @echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ - $(mt_bmarks_out); echo; - run: run-asm-tests run-bmarks-test run-debug: run-asm-tests-debug run-bmarks-test-debug +run-fast: run-asm-tests-fast run-bmark-tests-fast -.PHONY: run-asm-tests run-bmarks-test run-mt-tests -.PHONY: run-asm-tests-debug run-bmarks-test-debug run-mt-tests-debug -.PHONY: run run-debug +.PHONY: run-asm-tests run-bmark-tests +.PHONY: run-asm-tests-debug run-bmark-tests-debug +.PHONY: run run-debug run-fast junk += $(output_dir)