riscv/rocket-chip
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made tohost/fromhost 64 bits wide

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This commit is contained in:
Andrew Waterman
2012-01-03 15:09:08 -08:00
parent 20aee36c96
commit 142dfc6e07
2 changed files with 11 additions and 11 deletions
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4
rocket/src/main/scala/cpu.scala
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@ -13,8 +13,8 @@ class ioHost(view: List[String] = null) extends Bundle(view)
{
val start = Bool('input);
val from_wen = Bool('input);
val from = Bits(32, 'input);
val to = Bits(32, 'output);
val from = Bits(64, 'input);
val to = Bits(64, 'output);
}
class ioConsole(view: List[String] = null) extends Bundle(view)